ST10R272L - SYSTEM PROGRAMMING
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18.6 Table
searching
The following features decrease the execution time for table searches.
•
Branch delays are eliminated by the branch target cache after the first iteration of the
loop.
•
In non-sequentially searched tables, the enhanced performance of the ALU allows
more-complicated hash algorithms to be processed for better table distribution.
•
For sequentially searched tables, the auto-increment indirect addressing mode and the
E (end of table) flag stored in the PSW decrease the number of overhead instructions
executed in the loop.
The two examples below illustrate searching ordered tables and non-ordered tables,
respectively:
Note
The last entry in the table must be greater than the largest possible target.
Figure 121 Local registers
MOV
R0, #BASE
;Move table base into R0
LOOP:
CMP
R1, [R0+
;Compare target to table entry
JMPR
cc_SGT, LOO
;Test whether target has not been found
MOV
R0, #BASE
;Move table base into R0
LOOP:
CMP
R1, [R0+]
;Compare target to table entry
Old Stack
Area
Newly
Allocated
Register
Bank
R4
R3
R2
R1
R0
Old CP Contents
Old SP
New SP
New CP
New
Stack
Area
