ST10R272L - PWM MODULE
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PWM MODULE
A 1-channel pulse width modulation (PWM) module is implemented in the ST10R272L. The
minimum PWM signal frequency depends on the width (16 bits) and the resolution (CLK/1
or CLK/64) of the PWM timer. The maximum PWM signal frequency assumes that the PWM
output signal changes with every cycle of the timer. In a real applications the maximum PWM
frequency depends on the required resolution of the PWM output signal. For a list of PWM
frequencies refer to Table The following table summarizes the PWM frequencies that result
from various combinations of operating mode, counter resolution (input clock) and pulse
width resolution..
Figure 0.1
SFRs and port pins associated with PWM unit
The pulse width modulation module operates on channel 3 of the PWM module. This
channel has a 16-bit up/down counter PT3, a 16-bit period register PP3, a 16-bit pulse width
register PW3 with a shadow latch, two comparators, and the necessary control logic. The
PWMICE
ODP7
Port 7Open Drain Control Register
DP7
Port 7Direction Control Register
P7
Port 7 Data Register
PT3
PWM Channel 3 Timer Register
PP3
PWM Channel 3 Period Register
PW3
PWM Channel 3 Pulse Width Register
PWMCON0 PWM Control Register 0
PWCON1
PWM Control Register 1
PWMIC
PWM Interrupt Control Register
ODP7E
Ports & Direction Control
Alternate Functions
Data Registers
Counter Register
Control Registers and
Interrupt Control
PP3E
P7
PW3E
PT3
DP7
PWMCON1
PWMCON0
POUT0/P7.0
