ST10R272L - CENTRAL PROCESSING UNIT
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and should never be user modified. Otherwise, a correct continuation of an
interrupted multiply or divide operation cannot be guaranteed.
MDC (FF0Eh / 87h)
SFR
Reset Value: 0000h
The constant zeros register ZEROS
All bits of this bit-addressable register are fixed to ’0’, by hardware. This register is read-only.
Register ZEROS can be used as a register-addressable constant of all zeros, i.e. for bit
manipulation or mask generation. It can be accessed via any instruction capable of
addressing a SFR.
The constant ones register ONES
All bits of this bit-addressable register are fixed to ’1’, by hardware. This register is read-only.
Register ONES can be used as a register-addressable constant of all ones, i.e. for bit
Bit
Function
MDRIU
Multiply/Divide Register In Use
‘0’:
Cleared, when register MDL is read via software.
‘1’:
Set when register MDL or MDH is written via software, or when a multiply or
divide instruction is executed.
!!
Internal Machine Status
The multiply/divide unit uses these bits to control internal operations.
Never modify these bits without saving and restoring register MDC.
-
!!
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
r(w
-
-
-
-
-
-
-
-
!!
!!
!!
!!
!!
!!
-
-
-
-
r(w
r(w
r(w
r(w
r(w
r(w
r(w
MDR
IU
