ST10R272L - POWER REDUCTION MODES
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EXICON (F1C0h / E0h)
ESFR
Reset Value: 0000h
17.2.3 Exiting interruptible power down mode
When ‘interruptible power down mode’ is entered, the CPU and peripheral clocks are frozen,
and the oscillator and PLL are stopped. Interruptible power down mode can be exited by
asserting RSTIN or one of the enabled EXxIN pin (Fast External Interrupt).
RSTIN must be held low until the oscillator and PLL have stabilized.
EXxIN inputs are normally sampled interrupt inputs. However, the Power Down mode
circuitry uses them as level-sensitive inputs. An EXxIN Interrupt Enable bit (bit CCxIE in the
respective CCxIC register) need not to be set to bring the device out of Power Down mode.
An external RC circuit must be connected on the Vpp/RPD pin, as shown in the following
figure:
Bit
Functi
on
EXIxES
External Interrupt x Edge Selection Field (x=3...0)
0 0:
Fast external interrupts disabled: standard mode
EXxIN pin not taken in account for entering/exiting Power Down mode.
0 1:
Interrupt on positive edge (rising)
Enter Power Down mode if EXiIN = ‘0’, exit if EXxIN = ‘1’ (‘high’ active level)
1 0:
Interrupt on negative edge (falling)
Enter Power Down mode if EXiIN = ‘1’, exit if EXxIN = ‘0’ (‘low’ active level)
1 1:
Interrupt on any edge (rising or falling)
Always enter Power Down mode, exit if EXxIN level changed.
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
rw
rw
rw
EXI2ES
EXI0ES
EXI1ES
-
-
-
-
-
-
rw
-
EXI3ES
-
