ST10R272L - GENERAL PURPOSE TIMER UNITS
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This combined mode can be used to detect consecutive external events which may occur
periodically, but where a finer resolution, that means, more ’ticks’ within the time between
two external events is required.
For this purpose, the time between the external events is measured using timer T5 and the
CAPREL register. Timer T5 runs in timer mode counting up with a frequency of e.g.
f
CPU
/32.
The external events are applied to pin CAPIN. When an external event occurs, the timer T5
contents are latched into register CAPREL, and timer T5 is cleared (T5CLR=‘1’). Thus,
register CAPREL always contains the correct time between two events, measured in timer
T5 increments. Timer T6, which runs in timer mode counting down with a frequency of e.g.
f
CPU
/4, uses the value in register CAPREL to perform a reload on underflow. This means,
the value in register CAPREL represents the time between two underflows of timer T6, now
measured in timer T6 increments. Since timer T6 runs 8 times faster than timer T5, it will
underflow 8 times within the time between two external events. Thus, the underflow signal of
timer T6 generates 8 'ticks'. Upon each underflow, the interrupt request flag T6IR will be set
and bit T6OTL will be toggled. The state of T6OTL may be output on pin T6OUT. This signal
has 8 times more transitions than the signal which is applied to pin CAPIN.
Figure 91 GPT2 register CAPREL in capture-and-reload mode
