ST10R272L - CENTRAL PROCESSING UNIT
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The DPP registers are implicitly used whenever data accesses to any memory location are
made via indirect or direct long 16-bit addressing modes (except for override accesses via
EXTended instructions and PEC data transfers). After reset, the data page pointers are
initialized in a way that all indirect or direct long 16-bit addresses result in identical 18-bit
addresses. This makes it possible to access data pages 3...0 within segment 0, as shown in
below. If data paging is not required, no further action is required.
DPP0 (FE00h / 00h)
SFR
Reset Value: 0000h
DPP1 (FE02h / 01h)
SFR
Reset Value: 0001h
DPP2 (FE04h / 02h)
SFR
Reset Value: 0002h
DPP3 (FE06h / 03h)
SFR
Reset Value: 0003h
Data paging is performed by concatenating the lower 14 bits of an indirect or direct - long
-16-bit address, with the contents of the DDP register (selected by the upper two bits of the
16-bit address). The DPP register specifies one of the 1024 possible data pages. This data
Bit
Function
DPPxPN
Data page number of DPPx
Specifies the data page selected via DPPx. Only the least significant two bits of
DPPx are significant when segmentation is disabled.
-
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
rw
-
-
-
-
-
-
-
-
DPP0PN
-
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
rw
-
-
-
-
-
-
-
-
DPP1PN
-
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
rw
-
-
-
-
-
-
-
-
DPP2PN
-
-
-
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
-
rw
-
-
-
-
-
-
-
-
DPP3PN
