ST10R272L - SYNCHRONOUS SERIAL PORT
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The SSP is connected to the bus controller via a 16-bit demultiplexed bus. However,
address and data information of a SSP access will be only on those ports operating in
the currently selected bus mode, as shown in the table below.
When bit VISIBLE in register SYSCON is set, full visibility of all SSP accesses is provided if
a 16-bit demultiplexed bus mode is enabled through one of the BUSCON registers (PORT0
and PORT1 cannot be used for general purpose I/O in this case). All SSP accesses can be
monitored externally and read/write strobes are generated. The visibility of the segment
address depends on the number of segment address lines selected for Port 4.
13.2.16 Accessing the SSP in hold mode
When the ST10R272L is placed into hold mode by an external HOLD request, accesses to
external memory or peripherals have to wait until the HOLD request is deactivated. SSP
accesses, however, can be executed in this mode if bit VISIBLE in register SYSCON is
cleared. In this case, an access to the SSP is completely invisible to the external world. If bit
VISIBLE is set, then SSP accesses have to wait until the external HOLD request is removed.
Note
SSP accesses during HOLD mode are blocked after any attempt to access an
external location, even if the VISIBLE bit is cleared. The initiated external access
must be finished first, which requires the HOLD condition to be removed.
13.2.17 Power down mode
When the ST10R272L enters Power Down Mode, the XCLK (XBUS Clock) signal is turned
off and SSP operation stops. Any transfer operation in progress is interrupted.
After returning from Power Down Mode via hardware reset, the SSP must be reconfigured.
Currently Selected Bus Mode
Port
Visible Information of SSP Access
8-bit Multiplexed
P0L
Low Byte of SSP Write Data
P0H
High Byte of SSP Write Data
8-bit Demultiplexed
P0L
Low Byte of SSP Write Data (High byte not visible)
PORT1
16-bit SSP Address
16-bit Multiplexed
PORT0
16-bit SSP Write Data
16-bit Demultiplexed
PORT0
16-bit SSP Write Data
PORT1
16-bit SSP Address
Table 43 SSP visibilty
