
ST10R272L - INTERRUPT AND TRAP FUNCTIONS
97/320
When the interrupt service routine is left (RETI is executed), the status information is popped
from the system stack in the reverse order, taking into account the value of bit SGTDIS.
6.5.1 Context
switching
An interrupt service routine usually saves all the registers it uses on the stack, and restores
them before returning. The more registers a routine uses, the more time is taken by saving
and restoring. The ST10R272L is able to switch the complete bank of CPU registers (GPRs)
with a single instruction, so the service routine executes within its own, separate context.
The instruction ‘SCXT CP, #New_Bank’ pushes the content of the context pointer (CP) on
the system stack and loads CP with the immediate value ‘New_Bank’, which selects a new
register bank. The service routine can now use its ‘own registers’. This register bank is
preserved when the service routine terminates, i.e. its contents are available on the next call.
Before returning (RETI) the previous CP is simply POPped from the system stack, which
returns the registers to the original bank.
Note
The first instruction following the SCXT instruction must not use a GPR.
Resources that are used by the interrupting program must eventually be saved and restored,
e.g. the DPPs and the registers of the MUL/DIV unit.
Figure 22 Task status saved on the system stack
--
--
--
PSW
IP
--
PSW
CSP
IP
high address
Status of
interrupted task
SP
SP
SP
a) system stack before
interrupt entry
b) system stack after
interrupt entry
(unsegmented)
c) system stack after
interrupt entry
(segmented)
low address