ST10R272L - CENTRAL PROCESSING UNIT
61/320
The SP register can be updated by any instruction which is capable of modifying an SFR.
Due to the internal instruction pipeline, a POP or RETURN instruction must NOT
immediately follow an instruction that updates the SP register.
SP (FE12h / 09h)
SFR
Reset Value: FC00h
The stack overflow pointer STKOV
This non-bit addressable register is compared against the SP register after each operation,
which pushes data onto the system stack (e.g. PUSH and CALL instructions or interrupts),
and after each subtraction from the SP register. If the content of the SP register is less than
the content of the STKOV register, a stack overflow hardware trap will occur.
Since the least significant bit of register STKOV is tied to ’0’ and bits 15 through 12 are tied
to ’1’ by hardware, the STKOV register can only contain values from F000h to FFFEh.
The Stack Overflow Trap (entered when (SP) < (STKOV)) may be used in two different ways:
•
Fatal error indication treats the stack overflow as a system error - through the
associated trap service routine. Data in the bottom of the stack may have been
overwritten by the status information stacked on servicing the stack overflow trap.
•
Automatic system stack flushing uses the system stack as a ’Stack Cache’ for a
bigger external user stack. In this case, the STKOV register should be initialized to a
value which represents the desired lowest top-of-stack address plus 12, according to the
selected maximum stack size. This takes into account the worst possible case: when a
stack overflow condition is detected during entry into an interrupt service routine. Then,
Bit
Function
sp
Modifiable portion of register SP
Specifies the top of the internal system stack.
1
0
1
5
4
3
2
1
0
11
10
9
8
7
6
15
14
13
12
r
rw
r
r
r
1
1
r
sp
