ST10R272L - SYSTEM RESET
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SYSTEM RESET
The internal system reset function initializes the ST10R272L into a defined default state. It is
invoked either by asserting a hardware reset signal on pin RSTIN (hardware reset input),
upon the execution of the SRST instruction (software reset) or by an overflow of the
watchdog timer.
Whenever one of these conditions occurs, the microcontroller is reset into its predefined
default state through an internal reset procedure (warm hardware reset, software and
watchdog resets) or asynchronously with RSTIN (asynchronous reset).
The asynchronous reset condition is defined by a low level on RPD/Vpp pin while RSTIN pin
is asserted. Warm hardware reset (synchronized to the CPU clock) is defined by a high level
on RPD/Vpp pin. As long as the RSTIN pin is asserted, a weak internal pull-down is turned
on the RPD/Vpp pin.
When an asynchronous reset is initiated, the microcontroller is immediately
(asynchronously) reset into its predefined default state, and does not require a stabilized
clock signal on the XTAL1 pin. When this asynchronous reset condition is removed, the
microcontroller starts program execution from the memory location 00’0000h in code
segment zero.
When a reset other than asynchronous reset is initiated, pending internal hold states are
cancelled and the current internal access cycle (if any) is completed. External bus cycles are
aborted, except for a watchdog reset. Then the internal reset sequence starts, the bus pin
drivers and the I/O pin drivers are switched off (tristate), and the PORT0 pins are internally
pulled high. The RSTIN pin is driven low for 512 CPU clock cycles which is the internal reset
sequence duration. RSTOUT is activated and remains active until the execution of the EINIT
instruction. The CPU and peripherals are set in their predefined default state.
The internal reset condition is active at least for the duration of the reset sequence and then
until the RSTIN input is inactive. When this internal reset condition is removed, the reset
configuration is latched from PORT0, and pins ALE, RD and WR are driven to their inactive
levels.
After the internal reset condition is removed, the microcontroller starts program execution
from memory location 00’0000h in code segment zero. This start location will typically hold a
branch instruction to the start of a software initialization routine for the application specific
configuration of peripherals and CPU special function registers.
