ST10R272L - CENTRAL PROCESSING UNIT
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ALU Status (N, C, V, Z, E, MULIP)
The PSW condition flags (N, C, V, Z, E) show the ALU status from the last ALU operation.
They are set by rules which depend on the ALU or data movement operation performed by
an instruction.
After execution of an instruction which explicitly updates the PSW register, the condition
flags cannot be interpreted as described here, because any explicit write to the PSW
register supersedes the condition flag values implicitly generated by the CPU. Explicitly
reading the PSW register supplies a read value which represents the state of the PSW
register after execution of the immediately preceding instruction.
After reset, all of the ALU status bits are cleared.
N-Flag: For most ALU operations, the N-flag is set to ’1’ if the most significant bit of the result
contains a ’1’, otherwise it is cleared. In the case of integer operations the N-flag can be
interpreted as the sign-bit of the result (negative: N=’1’, positive: N=’0’). Negative numbers
are always represented as the 2's complement of the corresponding positive number. The
range of signed numbers extends from '–8000h' to '+7FFFh' for the word data-type, or from
'–80h' to '+7Fh' for the byte data-type. For Boolean bit operations with only one operand, the
N-flag represents the previous state of the specified bit. For Boolean bit operations with two
operands, the N-flag represents the logical XORing of the two specified bits.
C-Flag: After an addition, the C-flag indicates that a carry from the most significant bit of the
specified word or byte data-type has been generated. After a subtraction or a comparison,
the C-flag indicates a borrow, which represents the logical negation of a carry for the
addition.
This means that the C-flag is set to '1' if no carry (from the most significant bit of the
specified word or byte data-type) has been generated during a subtraction performed as a
2's complement addition, and the C-flag is cleared when this complement addition caused a
E
End of Table Flag
Set, when the source operand of an instruction is 8000h or 80h.
MULIP
Multiplication/Division In Progress
‘0’: There is no multiplication/division in progress.
‘1’: A multiplication/division has been interrupted.
USR0
User General Purpose Flag
May be used by the application software.
HLDEN,
ILVL, IEN
Interrupt and EBC Control Fields
Define the response to interrupt requests and enable external bus arbitration.
(Described in section “Interrupt and Trap Functions”)
Bit
Function
