NXP Semiconductors freescale KV4 Series, Reference Manual

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5.3.1 Read-after-write sequence and required serialization of
memory operations
In some situations, a write to a peripheral must be completed fully before a subsequent
action can occur. Examples of such situations include:
• Exiting an interrupt service routine (ISR)
• Changing a mode
• Configuring a function
In these situations, application software must perform a read-after-write sequence to
guarantee the required serialization of the memory operations:
1. Write the peripheral register
2. Read the written peripheral register to verify the write
3. Continue with subsequent operations
5.3.2 Peripheral Bridge 0 (AIPS-Lite 0) Memory Map
• Slots 0-79 are 32-bit data width modules,
• Slots 80-95 are 16-bit data width modules, and
• Slots 96-126 are 8-bit data width modules.
Table 5-2. Peripheral bridge 0 slot assignments
System 32-bit base address Slot
number
Module
On-platform
0x4000_0000 0 Peripheral bridge 0 (AIPS-Lite 0)
0x4000_1000 1 —
0x4000_2000 2 —
0x4000_3000 3 —
0x4000_4000 4 Reserved for XBAR Lite no registers
0x4000_5000 5 —
0x4000_6000 6 —
0x4000_7000 7 —
0x4000_8000 8 DMA controller
0x4000_9000 9 DMA controller transfer control descriptors
0x4000_A000 10 —
0x4000_B000 11 —
0x4000_C000 12 —
0x4000_D000 13 —
0x4000_E000 14 —
0x4000_F000 15 —
Table continues on the next page...
Chapter 5 Memory Map
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
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