NXP Semiconductors freescale KV4 Series, Reference Manual

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37.4.30 Capture Compare X Register (PWMA_SMnCAPTCOMPX)
Address: 4003_3000h base + 3Eh (96d × i), where i=0d to 3d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read EDGCNTX
EDGCMPX
Write
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PWMA_SMnCAPTCOMPX field descriptions
Field Description
15–8
EDGCNTX
Edge Counter X
This read-only field contains the edge counter value for the PWM_X input capture circuitry.
EDGCMPX Edge Compare X
This read/write field is the compare value associated with the edge counter for the PWM_X input capture
circuitry.
37.4.31 Capture Value 0 Register (PWMA_SMnCVAL0)
Address: 4003_3000h base + 40h (96d × i), where i=0d to 3d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read CAPTVAL0
Write
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PWMA_SMnCVAL0 field descriptions
Field Description
CAPTVAL0 This read-only register stores the value captured from the submodule counter. Exactly when this capture
occurs is defined by CAPTCTRLX[EDGX0]. Each capture will increase the value of
CAPTCTRLX[CX0CNT] by 1 until the maximum value is reached. Each read of this register will decrease
the value of CAPTCTRLX[CX0CNT] by 1 until 0 is reached. This register is not byte accessible.
37.4.32 Capture Value 0 Cycle Register (PWMA_SMnCVAL0CYC)
Address: 4003_3000h base + 42h (96d × i), where i=0d to 3d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read 0 CVAL0CYC
Write
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 37 Pulse Width Modulator A (PWMA/eFlexPWM)
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
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