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PWMA_SMnCVAL0CYC field descriptions
Field
Description
15–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
CVAL0CYC
This read-only register stores the cycle number corresponding to the value captured in CVAL0. This
register is incremented each time the counter is loaded with the INIT value at the end of a PWM modulo
cycle.
37.4.33 Capture Value 1 Register (PWMA_SMnCVAL1)
Address: 4003_3000h base + 44h (96d × i), where i=0d to 3d
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PWMA_SMnCVAL1 field descriptions
Field
Description
CAPTVAL1
This read-only register stores the value captured from the submodule counter. Exactly when this capture
occurs is defined by CAPTCTRLX[EDGX1]. Each capture increases the value of CAPTCTRLX[CX1CNT]
by 1 until the maximum value is reached. Each read of this register decreases the value of
CAPTCTRLX[CX1CNT] by 1 until 0 is reached. This register is not byte accessible.
37.4.34 Capture Value 1 Cycle Register (PWMA_SMnCVAL1CYC)
Address: 4003_3000h base + 46h (96d × i), where i=0d to 3d
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PWMA_SMnCVAL1CYC field descriptions
Field
Description
15–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
CVAL1CYC
This read-only register stores the cycle number corresponding to the value captured in CVAL1. This
register is incremented each time the counter is loaded with the INIT value at the end of a PWM modulo
cycle.
Memory Map and Registers
KV4x Reference Manual, Rev. 2, 02/2015
810
Preliminary
Freescale Semiconductor, Inc.
Summary of Contents for freescale KV4 Series
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