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SAMPLES
Rx pin input
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
1
1
1
1
0
PERCEIVED AND ACTUAL START BIT
LSB
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T2
R
T3
R
T4
R
T5
R
T1
R
T2
R
T3
R
T6
R
T7
R
T8
R
T9
R
T1
0
R
T1
1
R
T1
2
R
T1
3
R
T1
4
R
T1
5
R
T1
6
1
1
1
1
1
1
0
Figure 46-71. Start bit search example 4
The following figure shows a burst of noise near the beginning of the start bit that resets
the RT clock. The sample after the reset is low but is not preceded by three high samples
that would qualify as a falling edge. Depending on the timing of the start bit search and
on the data, the frame may be missed entirely or it may set the framing error flag.
SAMPLES
Rx pin input
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
1
1
1
1
0
0
START BIT
LSB
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T2
R
T3
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
NO START BIT FOUND
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
R
T4
R
T5
R
T6
R
T7
R
T1
R
T1
R
T1
Figure 46-72. Start bit search example 5
In the following figure, a noise burst makes the majority of data samples RT8, RT9, and
RT10 high. This sets the noise flag but does not reset the RT clock. In start bits only, the
RT8, RT9, and RT10 data samples are ignored.
Functional description
KV4x Reference Manual, Rev. 2, 02/2015
1306
Preliminary
Freescale Semiconductor, Inc.
Summary of Contents for freescale KV4 Series
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