NXP Semiconductors freescale KV4 Series, Reference Manual

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PDBx_SC field descriptions (continued)
Field Description
Writing 1 to this bit updates the internal registers of MOD, IDLY, CHnDLYm, DACINTx,and POyDLY with
the values written to their buffers. The MOD, IDLY, CHnDLYm, DACINTx, and POyDLY will take effect
according to the LDMOD.
After 1 is written to the LDOK field, the values in the buffers of above registers are not effective and the
buffers cannot be written until the values in buffers are loaded into their internal registers.
LDOK can be written only when PDBEN is set or it can be written at the same time with PDBEN being
written to 1. It is automatically cleared when the values in buffers are loaded into the internal registers or
the PDBEN is cleared. Writing 0 to it has no effect.
38.4.2 Modulus register (PDBx_MOD)
Address: Base a 4h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
MOD
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
PDBx_MOD field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
MOD PDB Modulus
Specifies the period of the counter. When the counter reaches this value, it will be reset back to zero. If the
PDB is in Continuous mode, the count begins anew. Reading this field returns the value of the internal
register that is effective for the current cycle of PDB.
38.4.3 Counter register (PDBx_CNT)
Address: Base a 8h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 CNT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PDBx_CNT field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
CNT PDB Counter
Table continues on the next page...
Chapter 38 Programmable Delay Block (PDB)
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
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