NXP Semiconductors freescale KV4 Series, Reference Manual

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Shift Register
Baud Rate
Generator
Shift Register
SOUT
SCK
PCSx
SPI Slave SPI Master
SIN SOUT
SIN
SS
SCK
Figure 44-26. Serial protocol overview
Generally, more than one slave device can be connected to the module master. 6
Peripheral Chip Select (PCS) signals of the module masters can be used to select which
of the slaves to communicate with. Refer to the chip configuration details for the number
of PCS signals used in this MCU.
The SPI configuration shares transfer protocol and timing properties which are described
independently of the configuration in
Transfer formats . The transfer rate and delay
settings are described in Module baud rate and clock delay generation .
44.5.1 Start and Stop of module transfers
The module has two operating states: Stopped and Running. Both the states are
independent of it's configuration. The default state of the module is Stopped. In the
Stopped state, no serial transfers are initiated in Master mode and no transfers are
responded to in Slave mode. The Stopped state is also a safe state for writing the various
configuration registers of the module without causing undetermined results. In the
Running state serial transfers take place.
The TXRXS bit in the SR indicates the state of module. The bit is set if the module is in
Running state.
The module starts or transitions to Running when all of the following conditions are true:
• SR[EOQF] bit is clear
• MCU is not in the Debug mode or the MCR[FRZ] bit is clear
• MCR[HALT] bit is clear
The module stops or transitions from Running to Stopped after the current frame when
any one of the following conditions exist:
• SR[EOQF] bit is set
Functional description
KV4x Reference Manual, Rev. 2, 02/2015
1202
Preliminary
Freescale Semiconductor, Inc.