If Doze mode is triggered during Freeze mode, FlexCAN requests to shut down the
clocks to the PE and CHI sub-modules, sets the LPMACK bit and negates the FRZACK
bit. If Doze Mode is triggered during transmission or reception, FlexCAN does the
following:
• Waits to be in either Idle or Bus Off state, or else waits for the third bit of
Intermission and checks it to be recessive
• Waits for all internal activities like arbitration, matching, move-in and move-out to
finish. A pending move-in is not taken into account.
• Ignores its Rx input pin and drives its Tx pin as recessive
• Shuts down the clocks to the PE and CHI sub-modules
• Sets the NOTRDY and LPMACK bits in CAN_MCR
The Bus Interface Unit continues to operate, enabling the CPU to access memory mapped
registers, except the Rx Mailboxes Global Mask Registers, the Rx Buffer 14 Mask
Register, the Rx Buffer 15 Mask Register, the Rx FIFO Global Mask Register. The Rx
FIFO Information Register, the Message Buffers, the Rx Individual Mask Registers, and
the reserved words within RAM may not be accessed when the module is in Doze Mode.
Exiting Doze mode is done in one of the following ways:
• CPU removing the Doze mode request
• CPU negating the DOZE bit of the CAN_MCR Register
• Self Wake mechanism
In the Self Wake mechanism, if the SLFWAK bit in CAN_MCR Register was set at the
time FlexCAN entered Doze mode, then upon detection of a recessive to dominant
transition on the CAN bus, FlexCAN negates the DOZE bit, requests to resume its clocks
and negates the LPMACK after the CAN protocol engine recognizes the negation of the
Doze mode request. It also sets the WAKINT bit in the ESR Register and, if enabled by
the WAKMSK bit in CAN_MCR, generates a Wake Up interrupt to the CPU. FlexCAN
will then wait for 11 consecutive recessive bits to synchronize to the CAN bus. As a
consequence, it will not receive the frame that woke it up. The following table details the
effect of SLFWAK and WAKMSK upon wake-up from Doze mode.
Table 43-117. Wake-up from Doze mode
SLFWAK
WAKINT
WAKMSK
FlexCAN clocks
enabled
Wake-up interrupt
generated
0
-
-
No
No
Table continues on the next page...
Chapter 43 Flex Controller Area Network (FlexCAN)
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
1161
Summary of Contents for freescale KV4 Series
Page 2: ...KV4x Reference Manual Rev 2 02 2015 2 Preliminary Freescale Semiconductor Inc...
Page 60: ...KV4x Reference Manual Rev 2 02 2015 60 Preliminary Freescale Semiconductor Inc...
Page 128: ...Debug Security KV4x Reference Manual Rev 2 02 2015 128 Preliminary Freescale Semiconductor Inc...
Page 138: ...Boot KV4x Reference Manual Rev 2 02 2015 138 Preliminary Freescale Semiconductor Inc...
Page 1358: ...KV4x Reference Manual Rev 2 02 2015 1358 Preliminary Freescale Semiconductor Inc...
