NXP Semiconductors freescale KV4 Series, Reference Manual

Page: 1042 / 1359

41.2.4 Glitch Filter
Because the logic of the quadrature decoder must sense transitions, the inputs are first run
through a glitch filter. This filter has a digital delay line sampling multiple time points on
the signal and verifying a stable new state before outputting this new state to the internal
logic. The sample rate of this delay line is programmable to adapt to a variety of signal
bandwidths.
41.2.5 Edge Detect State Machine
The edge detect state machine looks for changes in the four possible states of the filtered
PHASEA and PHASEB inputs, calculating the direction of motion. This information is
formatted as Count_Up and Count_Down signals. These signals are routed into up to
three up/down counters:
1. Position counter
2. Revolution counter
3. Position difference counter
41.2.6 Position Counter
The 32-bit position counter calculates up or down on every count pulse, generated by the
difference of PHASEA and PHASEB. This counter acts as an integrator, whose count
value is proportional to position. The direction of the count is determined by the count up
and count down signals. Position counters may be initialized to a predetermined value by
one of three different methods:
1. Software-triggered event
2. INDEX signal transition
3. HOME signal transition
The INDEX and HOME signals can be programmed to interrupt the processor. Whenever
the position counter is read, either UPOS or LPOS, a snapshot of the position counter, the
position difference counter, and the revolution counters are each placed into their
respective hold registers. The direction of the count is determined by Count_Up and
Count_Down signals.
Introduction
KV4x Reference Manual, Rev. 2, 02/2015
1042
Preliminary
Freescale Semiconductor, Inc.