NXP Semiconductors freescale KV4 Series, Reference Manual

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Enable single wire operation by setting C1[LOOPS] and the receiver source field,
C1[RSRC]. Setting C1[LOOPS] disables the path from the unsynchronized receiver input
signal to the receiver. Setting C1[RSRC] connects the receiver input to the output of the
TXD pin driver. Both the transmitter and receiver must be enabled (C2[TE] = 1 and
C2[RE] = 1).
46.5.6 Loop operation
In loop operation, the transmitter output goes to the receiver input. The unsynchronized
receiver input signal is disconnected from the UART.
RXD
Tx pin output
RXINV
TXINV
TRANSMITTER
RECEIVER
Figure 46-88. Loop operation (C1[LOOPS] = 1, C1[RSRC] = 0)
Enable loop operation by setting C1[LOOPS] and clearing C1[RSRC]. Setting
C1[LOOPS] disables the path from the unsynchronized receiver input signal to the
receiver. Clearing C1[RSRC] connects the transmitter output to the receiver input. Both
the transmitter and receiver must be enabled (C2[TE] = 1 and C2[RE] = 1).
46.6 Reset
All registers reset to a particular value are indicated in Memory map and registers .
46.7 System level interrupt sources
There are several interrupt signals that are sent from the UART. The following table lists
the interrupt sources generated by the UART. The local enables for the UART interrupt
sources are described in this table. Details regarding the individual operation of each
interrupt are contained under various sub-sections of
Memory map and registers .
However, RXEDGIF description also outlines additional details regarding the RXEDGIF
interrupt because of its complexity of operation. Any of the UART interrupt requests
listed in the table can be used to bring the CPU out of Wait mode.
Chapter 46 Universal Asynchronous Receiver/Transmitter (UART) / FlexSCI
KV4x Reference Manual, Rev. 2, 02/2015
Freescale Semiconductor, Inc.
Preliminary
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