NXP Semiconductors freescale KV4 Series, Reference Manual

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46.5.4.2 Nine-bit configuration
When C1[M] is set and C4[M10] is cleared and BDH[SBNS] is cleared, the UART is
configured for 9-bit data characters. If C1[PE] is enabled, the ninth bit is either
C3[T8/R8] or the internally generated parity bit. This results in a frame consisting of a
total of 11 bits. In the event that the ninth data bit is selected to be C3[T8], it will remain
unchanged after transmission and can be used repeatedly without rewriting it, unless the
value needs to be changed. This feature may be useful when the ninth data bit is being
used as an address mark.
When C1[M] and C4[M10] are set and BDH[SBNS] is cleared, the UART is configured
for 9-bit data characters, but the frame consists of a total of 12 bits. The 12 bits include
the start and stop bits, the 9 data character bits, and a tenth internal data bit. Note that if
C4[M10] is set, C1[PE] must also be set. In this case, the tenth bit is the internally
generated parity bit. The ninth bit can either be used as an address mark or a ninth data
bit.
See the following table.
Table 46-78. Configuration of 9-bit data formats
C1[PE] UC1[M] C1[M10]
Start
bit
Data
bits
Address
bits
Parity
bits
Stop
bit
0 0 0 See Eight-bit configuration
0 0 1 Invalid configuration
0 1 0 1 9 0 0 1
0 1 0 1 8 1
1
0 1
0 1 1 Invalid Configuration
1 0 0 See Eight-bit configuration
1 0 1 Invalid Configuration
1 1 0 1 8 0 1 1
1 1 1 1 9 0 1 1
1 1 1 1 8 1
1
1 1
1. The address bit identifies the frame as an address character.
NOTE
In the last column of the above table, the number of stop bits
become 2 when BDH[SBNS] is set.
Note
Unless in 9-bit mode with M10 set, do not use address mark
wakeup with parity enabled.
Functional description
KV4x Reference Manual, Rev. 2, 02/2015
1316
Preliminary
Freescale Semiconductor, Inc.