NXP Semiconductors freescale KV4 Series, Reference Manual

Page: 1138 / 1359

Table 43-113. Matching architecture
Structure SMB[RTR] CTRL2[RRS] CTRL2[EAC
EN]
MB[IDE] MB[RTR] MB[ID
1
] MB[CODE]
Mailbox 0 - 0 cmp
2
no_cmp
3
cmp_msk
4
EMPTY or
FULL or
OVERRUN
Mailbox 0 - 1 cmp_msk cmp_msk cmp_msk EMPTY or
FULL or
OVERRUN
Mailbox 1 0 - cmp no_cmp cmp RANSWER
Mailbox 1 1 0 cmp no_cmp cmp_msk EMPTY or
FULL or
OVERRUN
Mailbox 1 1 1 cmp_msk cmp_msk cmp_msk EMPTY or
FULL or
OVERRUN
FIFO
5
- - - cmp_msk cmp_msk cmp_msk -
1. For Mailbox structure, If SMB[IDE] is asserted, the ID is 29 bits (ID St ID Extended). If SMB[IDE] is negated, the
ID is only 11 bits (ID Standard). For FIFO structure, the ID depends on IDAM.
2. cmp: Compares the Rx SMB contents with the MB contents regardless the masks.
3. no_cmp: The Rx SMB contents are not compared with the MB contents.
4. cmp_msk: Compares the Rx SMB contents with MB contents taking into account the masks.
5. SMB[IDE] and SMB[RTR] are not taken into account when IDAM is type C.
A reception structure is free-to-receive when any of the following conditions is satisfied:
• The CODE field of the Mailbox is EMPTY
• The CODE field of the Mailbox is either FULL or OVERRUN and it has already
been serviced (the C/S word was read by the CPU and unlocked as described in
Mailbox lock mechanism )
• The CODE field of the Mailbox is either FULL or OVERRUN and an inactivation
(see Mailbox inactivation ) is performed
• The Rx FIFO is not full
The scan order for Mailboxes and Rx FIFO is from the matching element with lowest
number to the higher ones.
The matching winner search for Mailboxes is affected by the CAN_MCR[IRMQ] bit. If it
is negated, the matching winner is the first matched Mailbox regardless if it is free-to-
receive or not. If it is asserted, the matching winner is selected according to the priority
below:
1. the first free-to-receive matched Mailbox;
2. the last non free-to-receive matched Mailbox.
It is possible to select the priority of scan between Mailboxes and Rx FIFO by the
CAN_CTRL2[MRP] bit.
Functional description
KV4x Reference Manual, Rev. 2, 02/2015
1138
Preliminary
Freescale Semiconductor, Inc.