NXP Semiconductors freescale KV4 Series, Reference Manual

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• Voltage-controlled oscillator (VCO)
• External reference clock is used as the PLL source.
• Modulo VCO frequency divider
• Phase/Frequency detector
• Integrated loop filter
• Can be used as a clock source for other on-chip peripherals.
• Internal reference clock generator:
• Slow clock with nine trim bits for accuracy
• Fast clock with four trim bits
• Can be used as source clock for the FLL. In FEI mode, only the slow Internal
Reference Clock (IRC) can be used as the FLL source.
• Either the slow or the fast clock can be selected as the clock source for the MCU.
• Can be used as a clock source for other on-chip peripherals.
• Control signals for the MCG external reference low power oscillator clock generators
are provided:
• HGO, RANGE, EREFS
• External clock from the Crystal Oscillator :
• Can be used as a source for the FLL and/or the PLL.
• Can be selected as the clock source for the MCU.
• External clock monitor with reset and interrupt request capability to check for
external clock failure when running in FBE, PEE, BLPE, or FEE modes
• Lock detector with interrupt request capability for use with the PLL
• Internal Reference Clocks Auto Trim Machine (ATM) capability using an external
clock as a reference
• Reference dividers for both the FLL and the PLL are provided
• Reference dividers for the Fast Internal Reference Clock are provided
•
• MCG FLL Clock (MCGFLLCLK) is provided as a clock source for other on-chip
peripherals
Introduction
KV4x Reference Manual, Rev. 2, 02/2015
546
Preliminary
Freescale Semiconductor, Inc.