S5PC100 USER’S MANUAL (REV1.0)
USB2.0 HS OTG
8.10-59
DCTL
Bit
Description
R/W
Reset
Value
GNPINNakSts
[2]
Global Non-Periodic IN NAK Status
•
1'b0 : A handshake is sent based on the data availability in
the transmit FIFO.
•
1'b1 : A NAK handshake is sent out on all non-periodic IN
endpoints, irrespective of the data availability in the transmit
FIFO.
R 1'b0
SftDiscon
[1]
Soft Disconnect
The application uses this bit to signal the OTG core to do a
soft disconnect. As long as this bit is set, the host does not
see that the device is connected, and the device will not
receive signals on the USB. The core stays in the
disconnected state until the application clears this bit.
•
1'b0 : Normal operation. If this bit is cleared after a soft
disconnect, the core drives the opmode signal on the UTMI+
to 2’b00, which generates a device connect event to the USB
host. If the device is reconnected, the USB host restarts
device enumeration.
•
1'b1 : The core drives the opmode signal on the UTMI+ to
2'b01, which generates a device disconnect event to the
USB host.
R/W 1'b0
RmtWkUpSig
[0]
Remote Wakeup Signaling
If the application sets this bit, the core initiates remote
signaling to wake up the USB host. The application must set
this bit to instruct the core to exit the Suspend state. As
specified in the USB 2.0 specification, the application must
clear this bit 1-15ms after setting it.
R/W 1'b0
The following table lists the minimum duration under various conditions for which the SoftDisconnect bit must be
set for the USB host to detect a device disconnect. To accommodate clock jitter, it is recommended that the
application add some extra delay to the specified minimum duration.
Operating Speed
Device state
Minimum Duration
High speed
Suspended
1ms + 2.5
μ
s
High speed
Idle
3ms + 2.5
μ
s
High speed
Not Idle or Suspended
(Performing transactions)
125
μ
s
Full speed/ Low speed
Suspended
1ms + 2.5
μ
s
Full speed/ Low speed
Idle
2.5
μ
s
Full speed/ Low speed
Not Idle or Suspended
(Performing transactions)
2.5
μ
s
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...