Samsung S5PC100, User Manual

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Power Management S5PC100 USER’S MANUAL (REV1.0)
2.4-52
10.1.3 Configure Power Manager at Normal Mode (NORMAL_CFG, R/W, Address = 0xE010_8010)
NORMAL_CFG Bit Description Reset Value
Reserved
[31:24] Reserved 0x00
Reserved
[23:8] DO NOT CHANGE 0xFFFF
Reserved
[7:6] DO NOT CHANGE 0x3
AUDIO [5]
Audio Sub-system : I2S0, SRAM (128 KB)
0 = LP mode(OFF), 1 = active mode(ON)
1
TV [4]
TV Sub-system : HDMI, MIXER, VP, TVEncoder
0 = LP mode(OFF), 1 = active mode(ON)
1
LCD [3]
LCD Sub-system : CAMIF, DISPCON, G2D, JPEG,
MIPI_CSI, MIPI_DSI, ROTATOR
0 = LP mode(OFF), 1 = Active mode(ON)
1
G3D [2] 0 = LP mode(OFF), 1 = Active mode(ON) 1
MFC [1] 0 = LP mode(OFF), 1 = Active mode(ON) 1
Reserved [0] DO NOT CHANGE 1
Note. When NORMAL_CFG[3](LCD) is set to 0, LPMP3_MODE_SEL(bit[0]) in LPMP3_MODE_SEL in
Chapter 2.3. Clock Controller is recommended to be set to 1 in order to minimize the internal current.
10.1.4 Configure Power Manager at STOP mode (STOP_CFG, R/W, Address = 0xE010_8014)
STOP_CFG Bit Description Reset Value
TOP_MEMORY_ON
(1)
[31]
If TOP_LOGIC_ON = 0, you should set this bit to 0.
0 = RET or OFF, 1 = ON
0
Reserved [30] DO NOT CHANGE 0
ARM_L2CACHE_RET
(2)
[29]
0 = No Retention(On or OFF),
1 = Retention
1
Reserved
[28:21] DO NOT CHANGE 0x0
Reserved
[20] DO NOT CHANGE 1
Reserved
[19:18] DO NOT CHANGE 0
ARM_LOGIC_ON
(3)
[17] 0 = LP mode(OFF), 1 = Active mode(ON) 1
Reserved [16:9] DO NOT CHANGE 0x0
TOP_LOGIC_ON [8]
This bit has no effect if ARM_LOGIC_ON = 1.
0 = LP mode(Retention), 1 = Active mode(ON)
1
Reserved [7:1] DO NOT CHANGE 0x0
OSC_EN_STOP
(4)
[0]
Control all X-tal oscillator pads, i.e., main X-tal
oscillator(XXTI), 27M X-tal oscillator(XXTI27), and USB X-
tal oscillator(XusbXTI) in STOP mode
0 = Disable
1 = Enable
0