Samsung S5PC100, User Manual

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S5PC100 USER’S MANUAL (REV1.0) CF CONTROLLER
5.5-17
1.10 EBI BACKOFF SUPPORTED PROTOCOL
In the UDMA/ MDMA Class (True IDE mode), Device I/F can used with EBI (External BUS Interface) MUX;
In this case, if the EBIBACKOFF signal is issued (by the higher priority controller), CFCON terminates the current
transfer (unit is sector) as soon as possible.
1.10.1 Level 1
1. EBI issues EBI-BACKOFF signal, during operation with UDMA/MDMA Class.
2. Issues interrupt request to CPU (ebi_bf_rd_int or ebi_bf_wr_int)
3. CPU asserts ABORT command to ATA controller (Write SFR xfr_command in ATA_COMMAND).
4. ATA Controller releases EBI BUS and interrupt bit is cleared (Other device is used to EBI BUS).
5. Make software reset by ATA_SWRST to clear the leftover values of internal registers.
6. Re-sets transfer configuration and re-start remaining data transmission continuously.
- Set ‘ebi_bf_en’ SFR in ATA_CFG_2.
- Unmasking Interrupt bit (mask_ebi_bf_rd_int or mask_ebi_bf_wr_int).
1.10.2 Level 2
1. EBI issues EBI-BACKOFF signal, during write operation with UDMA/MDMA Class.
2. Complete operation for current transfer sector.
3. Aborts ATA I/F and releases EBI BUS (Other device is used to EBI BUS).
4. Issues interrupt request to CPU (ebi_abort_rd_int or ebi_abort_wr_int)
5. Check status register until transfer has done (ABORT command is applied).
- Read & Wait until {ATA_STATUS[1:0] == 2’b00}.
6. Make software reset by ATA_SWRST to clear the leftover values of internal registers.
7. Re-sets transfer configuration and re-start remaining data transmission continuously.
- Set ‘ebi_bf_en’ and ‘ebi_abort_rd’(or ‘ebi_abort_wr’) SFR in ATA_CFG_2.
- Unmasking Interrupt bit (mask_ebi_abort_rd_int or mask_ebi_abort_wr_int).