Samsung S5PC100, User Manual

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USB2.0 HS OTG S5PC100 USER’S MANUAL (REV1.0)
8.10 -70
8.2.49 Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn, R/W, Address = 0xED n*20h,
0xED n*20h)
Endpoint_number :1
≤
n
≤
15
The application uses this register to control the behavior of each logical endpoint other than endpoint 0.
DIEPCTLn/
DOEPCTLn
Bit Description R/W Reset
Value
EPEna [31] Endpoint Enable
Applies to IN and OUT endpoints.
For IN endpoint, this bit indicates that data is ready to be
transmitted on the endpoint. For OUT endpoints, this bit indicates
that the application has allocated the memory to start receiving
data from the USB. The core clears this bit before setting any of
the following interrupts on this endpoint :
•
SETUP Phase Done (OUT only)
•
Endpoint Disabled
•
Transfer Complete Transfer Completed
Note: For control OUT endpoints in DMA mode, this bit must be
set to be able to transfer SETUP data packets in memory.
R_WS
_SC
1'b0
EPDis [30] Endpoint Disable
Applies to IN and OUT endpoints.
The application sets this bit to stop transmitting/ receiving data on
an endpoint, even before the transfer for that endpoint is
complete. The application must wait for the Endpoint Disabled
interrupt before treating the endpoint as disabled. The core clears
this bit before setting the Endpoint Disabled Interrupt. The
application must set this bit only if Endpoint Enable is already set
for this endpoint. R_WS
_SC
1'b0
SetD1PID [29] Set DATA1 PID
Applies to interrupt/ bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID (DPID) field in this
register to DATA1. W 1'b0
SetOddFr Set Odd (micro) frame
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/ Odd (micro) frame field to odd
(micro)frame.
SetD0PID [28] Set DATA0 PID
Applies to interrupt/ bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID (DPID) field in this
register to DATA0. W 1'b0
SetEvenFr Set Even (micro) frame
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/ Odd (micro) frame field to even
(micro) frame.
SNAK [27] Set NAK
Applies to IN and OUT endpoints.
A write to this bit sets the NAK bit for the endpoint. Using this bit,
the application controls the transmission of NAK handshakes on
an endpoint. The core can also set this bit for OUT endpoints on W 1'b0