Samsung S5PC100, User Manual, Page: 1852 / 1863

ELECTRICAL DATA S5PC100 USER’S MANUAL (REV1.0)
12.1-20
Table 12.1- 13 Memory Port 1 Interface Timing Constants (LPDDR1 SDRAM)
(VDD_INTNT= 1.2V
±
0.05V, TA = -40 to 85
°
C, VDDm1 = 1.7V – 1.9V)
Parameter Symbol Min Max Unit
DDR SDRAM Address Delay
t
SAD
2.86 3.73 ns
DDR SDRAM Chip Select Delay
t
SCSD
2.75 2.95 ns
DDR SDRAM Row active Delay
t
SRD
2.86 3.61
ns
DDR SDRAM Column active Delay
t
SCD
2.85 3.50
ns
DDR SDRAM Byte Enable Delay
t
SBED 2.87 3.46 ns
DDR SDRAM Write enable Delay
t
SWD
2.86 3.62 ns
DDR SDRAM Output data access time from CK
t
SAC 2.00 5.50 ns
DDR SDRAM Row Precharge time
t
RP
18.00 - ns
DDR SDRAM RAS to CAS delay
t
RCD
18.00 - ns
DDR SDRAM Write recovery time
t
WR
12.00 - ns
DDR SDRAM Clock low level width
t
CL
0.45 0.55
tCK
DDR SDRAM Read Preamble
t
RPRE
0.90 1.10 tCK
DDR SDRAM Read Postamble
t
RPST
0.40 0.60 tCK
DDR SDRAM Write Postamble time
t
WPST
0.40 0.60 tCK
DDR SDRAM Clock to valid DQS-In
t
DQSS
0.75 1.25 tCK
DDR SDRAM DQS-In Setup time
t
WPRES 1.30 - ns
DDR SDRAM DQS-In Hold time
t
WPREH
1.30 -
ns
DDR SDRAM DQS-In high level width
t
DQSH 0.35 0.60 tCK
DDR SDRAM DQS-In low level width
t
DQSL
0.35 0.60
tCK
DDR SDRAM read Data Setup time
t
DDS - 0.50 ns
Load Capacitance
Xm1* < 15pF