
S5PC100 USER’S MANUAL (REV1.0)
SD/MMC CONTROLLER
8.12-67
9.24
CAPABILITIES REGISTER
Capabilities Register
•
CAPAREG0, HWInit, Address = 0xED80_0040
•
CAPAREG1, HWInit, Address = 0xED90_0040
•
CAPAREG2, HWInit, Address = 0xEDA0_0040
This register provides the Host Driver with information specific to the Host Controller implementation. The Host
Controller implements these values as fixed or loaded from flash memory during power on initialization. Refer to
Software Reset for the Software Reset register for loading from flash memory and completion timing control.
CAPAREG
Bit
Description
Reset Value
Reserved [31:27]
Reserved
CAPAV18
[26]
Voltage Support 1.8V (HWInit)
'1' = 1.8V Supported
'0' = 1.8V Not Supported
1
CAPAV30
[25]
Voltage Support 3.0V (HWInit)
'1' = 3.0V Supported
'0' = 3.0V Not Supported
0
CAPAV33
[24]
Voltage Support 3.3V (HWInit)
'1' = 3.3V Supported
'0' = 3.3V Not Supported
1
CAPASUSRES [23]
Suspend/Resume Support (HWInit)
This bit indicates whether the Host Controller supports Suspend
/ Resume functionality. If this bit is 0, the Suspend and Resume
mechanism are not supported and the Host Driver does not
issue either Suspend or Resume commands.
'1' = Supported
'0' = Not Supported
1
CAPADMA
[22]
DMA Support (HWInit)
This bit indicates whether the Host Controller is capable of using
DMA to transfer data between system memory and the Host
Controller directly.
'1' = DMA Supported
'0' = DMA Not Supported
1
CAPAHSPD
[21]
High Speed Support (HWInit)
This bit indicates whether the Host Controller and the Host
System support High Speed mode and they can supply SD
Clock frequency from 25MHz to 50MHz.
'1' = High Speed Supported
'0' = High Speed Not Supported
1
Reserved [20]
Reserved
0
CAPAADMA2 [19]
ADMA2
Support
This bit indicates whether the Host Controller is capable of using
ADMA2.
1
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...