Samsung S5PC100, User Manual, Page: 787 / 1863

S5PC100 USER’S MANUAL (REV1.0) MIPI DSIM
8.7-31
3.2.18 FIFO Status & Control Register (DSIM_FIFOCTRL, R, Address = 0xECB0_0x44 : hidden)
DSIM_FIFOCTRL Bit Description R/W Reset Value
Reserved [31:26] Reserved - -
FullRx [25] Rx FIFO full R 0
EmptyRx [24] Rx FIFO empty R 1
FullHSfr [23] SFR packet header FIFO full R 0
EmptyHSfr [22] SFR packet header FIFO empty R 1
FullLSfr [21] SFR payload FIFO full R 0
EmptyLSfr [20] SFR payload FIFO empty R 1
FullHI80 [19] I80 packet header FIFO full R 0
EmptyHI80 [18] I80 packet header FIFO empty R 1
FullLI80 [17] I80 payload FIFO full R 0
EmptyLI80 [16] I80 payload FIFO empty R 1
FullHSub [15] Sub display packet header FIFO full R 0
EmptyHSub [14] Sub display packet header FIFO empty R 1
FullLSub [13] Sub display payload FIFO full R 0
EmptyLSub [12] Sub display payload FIFO empty R 1
FullHMain [11] Main display packet header FIFO full R 0
EmptyHMain [10] Main display packet header FIFO empty R 1
FullLMain [9] Main display payload FIFO full R 0
EmptyLMain [8] Main display payload FIFO empty R 1
Reserved [7:5] Reserved - -
nInitRx [4] MD FIFO read point initialize R/W 1
nInitSfr [3] SFR FIFO write point initialize R/W 1
nInitI80 [2] I80 FIFO write point initialize R/W 1
nInitSub [1] SD FIFO write point initialize R/W 1
nInitMain [0] MD FIFO write point initialize R/W 1