Samsung S5PC100, User Manual

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USB2.0 HS OTG S5PC100 USER’S MANUAL (REV1.0)
8.10 -58
8.2.34 Device Control Register (DCTL, R/W, Address = 0xED20_0804)
DCTL Bit Description R/W Reset
Value
Reserved [31:12] - 20'h0
PWROnPrgDon
e [11] Power-On Programming Done
The application uses this bit to indicate that register
programming is complete after a wake-up from Power Down
mode.
R/W 1'b0
CGOUTNak [10] Clear Global OUT NAK
A write to this field clears the Global OUT NAK. W 1'b0
SGOUTNak [9] Set Global OUT NAK
A write to this field sets the Global OUT NAK.
The application uses this bit to send a NAK handshake on all
OUT endpoints.
The application must set this bit after making sure that the
Global OUT NAK Effective bit in Core Interrupt Register is
cleared. W 1'b0
CGNPInNAK [8] Clear Global Non-Periodic IN NAK
A write to this field clears the Global Non-Periodic IN NAK. W 1'b0
SGNPInNAK [7] Set Global Non-Periodic IN NAK
A write to this field sets the Global Non-Periodic IN NAK. The
application uses this bit to send a NAK handshake on all
non-periodic IN endpoints. The core sets this bit if a timeout
condition is detected on a non-periodic endpoint. The
application must set this bit only after making sure that the
Global IN NAK Effective bit in the Core Interrupt Register is
cleared. W 1'b0
TstCtl [6:4] Test Control
•
3'b000 : Test mode disabled
•
3'b001 : Test_J mode
•
3'b010 : Test_K mode
•
3'b011 : Test_SE0_NAK mode
•
3'b100 : Test_Packet mode
•
3'b101 : Test_Force_Enable
•
Others : Reserved
R/W 3'b0
GOUTNakSts [3] Global OUT NAK Status
•
1'b0 : A handshake is sent based on the FIFO Status and
the NAK and STALL bit settings.
•
1'b1 : No data is written to the RxFIFO, irrespective of
space availability. Sends a NAK handshake on all packets,
except on SETUP transactions. All isochronous OUT packets
are dropped.
R 1'b0