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S5PC100 USER’S MANUAL (REV1.0)
USB2.0 HS OTG
8.10-7
6.4 APPLICATION ACCESS TO THE CSRS
The Access column of each register description that follows specifies how the application and the core access the
register fields of the CSRs. The following conventions are used.
Read Only
R
The application has permission to read the Register field. Writes
to read-only fields have no effect.
Write Only
W
The application has permission to write in the Register field.
READ and Write
R/ W
The application has permission to read and writes in the Register
field. The application sets this field by writing 1’b1 and clears it by
writing 1’b0.
Read, Write, and
Self Clear
R/ W_SC
Register field is read and written by the application (Read and
Write), and is cleared to 1'b0 by the core (Self Clear). The
conditions under which the core clears this field are explained in
detail in the field's description.
Read, Write, Self Set,
and Self Clear
R/ W_SS_SC
Register field is read and written by the application (Read and
Write), set to 1'b1 by the core on certain USB events (Self Set),
and cleared to 1'b0 by the core (Self Clear).
Read, Self set, and
Write Clear
R/ SS_WC
Register field is read by the application (Read), set to 1'b1 by the
core on certain internal or USB or AHB event (Self Set), and
cleared to 1'b0 by the application with a register write of 1'b1
(Write Clear). A register write of 1'b0 has no effect on this field.
Read, Write Set, and
Self Clear
R/ WS_SC
Register field is read by the application (Read), set to 1'b1 by the
application with a register write of 1'b1 (Write Set), and is cleared
to 1'b0 by the core (Self Clear). The application cannot clear this
type of field, and a register write of 1'b0 to this bit has no effect
on this field.
Read, Self set, and Self
Clear or Write Clear
R/ SS_SC_WC
Register field is read by the application (Read), set to 1'b1 by the
core on certain internal or USB or AHB events (Self Set), and
cleared to 1'b0 either by the core itself (Self Clear) or by the
application with a register write of 1'b1 (Write Clear). A register
write of 1’b0 to this bit has no effect on this field.
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...