Samsung S5PC100, User Manual

Page: 477 / 1863

NAND FLASH CONTROLLER S5PC100 USER’S MANUAL (REV1.0)
5.4-12
5.8 8-BIT ECC PROGRAMMING GUIDE (DECODING)
1. To use 8-bit ECC in software mode, set the MsgLength to 0 (512-byte message length) and set the ECCType
to “01” (enable 8bit ECC). The ECC module generates ECC parity code for 512-byte read data. Therefore
reset ECC value by writing the InitMECC (NFCONT[5]) bit as ‘1’ after clearing the MainECCLock
(NFCONT[7]) bit to ‘0’(Unlock.
MainECCLock (NFCONT[7]) bit controls the generation of ECC parity code.
Note: In 8-bit ECC, MainECCLock should be cleared before InitMECC
2. The MLC ECC module generates ECC parity code internally whenever data is read.
3. After 512-byte (does not include spare area data) data is read, set the MainECCLock (NFCONT[7]) bit to
‘1’(Lock) and read parity codes. The 8-bit ECC module needs parity codes to detect whether error bits are
generated or not. Therefore read ECC parity code right after 512-byte is read. Once ECC parity code is read,
MLC ECC engine start to search internal error. 8-bit ECC error searching engine need minimum 372 cycles to
find any error. During this time, continue read main data from external NAND Flash memory.
ECCDecDone(NFSTAT[6]) is used to check whether ECC decoding is complete.
4. If ECCDecDone (NFSTAT[6]) is set (‘1’), NF8ECCERR0 indicates whether error bit exist or not. If any error
exists, fix it by referring NF8ECCERR0/1/2 and NFMLC8BITPT0/1 registers.
5. If more main data has to be read, continue from step 1.
6. For meta data error check, set the MsgLength to 1(24-byte message length) and set the ECCType to “01”
(enable 8-bit ECC). The ECC module generates ECC parity code for 512-byte read data. Therefore reset
ECC value by writing the InitMECC (NFCONT[5]) bit as ‘1’ after clearing the MainECCLock (NFCONT[7]) bit
to ‘0’(Unlock).
MainECCLock (NFCONT[7]) bit controls the generation of ECC parity code.
7. The 8-bit ECC module generates ECC parity code internally whenever data is read.
8. After 512-byte data (not include spare area data) is read, set the MainECCLock (NFCONT[7]) bit to ‘1’(Lock)
and read parity codes. The MLC ECC module needs parity codes to detect whether error bits are generated
or not. Therefore read ECC parity codes right after read 512-byte. Once ECC parity code is read, 8-bit ECC
engine starts to search internal error. 8-bit ECC error searching engine need minimum 372 cycles to find any
error. During this time, continue read main data from external NAND Flash memory.
ECCDecDone(NFSTAT[6]) is used to check whether ECC decoding is complete.
9. If ECCDecDone (NFSTAT[6]) is set (‘1’), NF8ECCERR0 indicates whether error bit exist or not. If error exists,
fix it by referring NF8ECCERR0/1/2 and NF8MLCBITPT registers.