MFC (MULTI FORMAT CODEC)
S5PC100 USER’S MANUAL (REV1.0)
9.11-12
H.263 Annex J In-loop Filter
The filtering is performed on 8x8 block edges, except across picture edge. The filtered data are clipped to the
range of 0 to 255. The horizontal edges are filtered first from top to bottom, and then vertical edges are filtered
from left to right. The pixels that are used in filtering across a horizontal edge shall not have been influenced by
previous filtering across a vertical edge. Global parameters for filtering operation such as annex J control value
are set by the video stream processor.
VC1 Overlap Smoothing Filter
VC-1 overlap-smoothing filtering shall be performed subsequent to decoding the frame, and prior to deblocking
filter. The edges of an 8x8 block that separate two intra blocks are filtered. Overlap smoothing filer shall be carried
out on the unclamped 10 bit reconstruction. In progressive and filed picture, vertical edges shall be filtered first,
followed by the horizontal edges. In interlace picture, only the vertical edges shall be filtered and horizontal block
boundaries shall not be filtered. The core filter applied to the four pixels is given blow:
Subsequent to filtering, the constant value of 128 shall be added to each pixel of the block, which shall be
clamped to the range [0 255] to produce the reconstructed output. The video stream processor writes the overlap
smoothing filer control value, conditional overlap flag, slice type, profile and so on.
VC1 In-loop Filter
VC-1 deblocking filtering process operates on the pixels that border neighboring blocks. For P pictures, the block
boundaries may occur at every 4
th
, 8
th
, 12
th
, etc pixel row or column depending on whether an inverse transform
type. For I pictures filtering occurs at every 8
th
, 16
th
, 24
th
, etc pixel row and column.
The horizontal boundary lines shall be filtered first followed by the vertical lines. For I frames, all the 8x8
boundaries are filtered. For P pictures, blocks may be intra or inter-coded. Intra-coded blocks use an 8x8 inverse
transform, whereas inter-coed blocks use an 8x8, 8x4, 4x8 or 4x4 inverse transform. The boundary between
transform blocks shall be filtered. In each 4-pixel segment, the result of third pixel pair filter operation determines
whether the other three pixels in the segment are also filtered. In interlace frame, the filtering shall be done using
the same field lines, never mixing different field lines. For horizontal block boundary, the two top field lines are
filtered across the block boundary using top field lines only and the two bottom field lines across the block
boundary shall be filtered using bottom field lines only
Post Filter
Post filter operates re-using H.264 in-loop filtering. The filter strength is determined as intra macroblock mode. All
8x8 block edges in MPEG4 and H.263 or all 4x4 block edges in H.264 and VC1 are filtered in the same order of
H.264 in-loop filter.
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...