Samsung S5PC100, User Manual

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S5PC100 USER’S MANUAL (REV1.0) CCAN
8.5-3
Figure 8.5-1 Block Diagram of the C_CAN
4 OPERATION MODES
4.1 SOFTWARE INITIALISATIOIN
The software initialization is started by setting the bit Init in the CAN Control Register, either by software or by a
hardware reset, or by going Bus_Off.
While Init is set, all message transfer from and to the CAN bus is stopped. The status of the CAN bus output
CAN_TX is recessive (HIGH). The counters of the EML are unchanged. Setting Init does not change any
configuration register.
To initialize the CAN Controller, the CPU has to set up the Bit Timing Register and each Message Object. If a
Message Object is not needed, it is sufficient to set it's MsgVal bit to not valid. Otherwise, the whole Message
Object has to be initialized.
Access to the Bit Timing Register and to the BRP Extension Register for the configuration of the bit timing is
enabled if both bits Init and CCE in the CAN Control Register are set.
Resetting Init (by CPU only) finishes the software initialization. Later the Bit Stream Processor BSP (Refer Section
4.10 on Page 34) synchronizes itself to the data transfer on the CAN bus by waiting for the occurrence of a
sequence of 11 consecutive recessive bits (º Bus Idle) before it can take part in bus activities and starts the
message transfer.