Samsung S5PC100, User Manual

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S5PC100 USER’S MANUAL (REV1.0) Power Management
2.4-27
6.8 TS ADC
In NORMAL mode, TS ADC is in Run mode. External power to TS ADC has to be supplied even if they are not
used in normal mode.
In IDLE mode, DEEP-IDLE mode, STOP and DEEP-STOP, TS ADC is in Stand-by mode, and therefore it is
normally used since TS_PENDN signal from TS ADC is used to wakeup source in these power mode.
In SLEEP mode, external power to TS ADC can be off. Power mode of TS ADC in SLEEP mode has no meaning.
6.9 DIGITAL I/O
I/Os used in S5PC100 are divided into two groups, i.e., digital I/Os and analog I/Os, and digital I/Os are also
divided into normal I/Os and alive I/Os.
All digital I/Os have internal power (1.2V) and I/O power (1.8~3.3V). Internal power is supplied separately for
normal I/Os and alive I/Os. That is, internal power for alive I/Os should be always supplied, but internal power for
normal I/Os should be always supplied except SLEEP mode. I/O power should be always supplied in any power
mode.
Alive I/Os and normal I/Os should be always supplied. Alive I/Os are listed in Table 2.4-10.
In DEEP-IDLE mode (top domain off), normal I/Os except I2S related I/O do not work since top domain is power-
off.
In DEEP-STOP mode (top domain off), all normal I/Os do not work.
In SLEEP mode, normal I/O does not work since internal power to normal I/O is off, but alive I/O always works
since power to alive I/O is always on. Nontheless, I/O power to normal I/O should be supplied such as
VDDQ_DDR, VDDQ_M0, VDDQ_LCD, VDDQ_CI, VDDQ_MMC, VDDQ_AUD, VDDQ_MSM, VDDQ_SYS0,
VDDQ_SYS2, VDDQ_SYS5, VDDQ_CAN, VDDQ_EXT, VDDQ_RTC, VDDQ_UH.
Table 2.4-10 List of Alive I/O
ALIVE I/O XEINT[31:0], XPWRRGTON, XOM[4:0], XnRESET, XnWRESET, XnBATF
6.9.1 OUTPUT PORT State in DEEP-IDLE, DEEP-STOP and SLEEP mode
In DEEP-IDLE mode (top domain off) and DEEP-STOP mode (top domain off), the output port of normal I/O keeps
it’s driving value before it enters DEEP-IDLE/DEEP-STOP mode. Normal I/O has output retention function, and it
keeps its driving value by using latch. The retention control signal to input port (CLTCH, CPGI) of normal I/O is
generated by PMU when entering DEEP-IDLE/DEEP-STOP mode.
Alive I/O also keeps its driving value from power-off region before it enters DEEP-IDLE/DEEP-STOP mode. PMU
generates retention control signal (CPGI).
In SLEEP mode, internal power to normal I/O is off, and I/O power to normal I/O is still on.
Alive I/O changes its output path from Normal path (power-off region) to ALIVE path (ALIVE module). ALIVE
module drives output value of alive I/O in SLEEP mode. Read value from alive I/O goes to ALIVE module. This
read values acts as wakeup source in SLEEP mode.