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S5PC100 USER’S MANUAL (REV1.0)
CCAN
8.5-21
6.2.7
BRP Extension Register
•
CAN0_BRP, R/W, Address = 0xEC70_0018
•
CAN1_BRP, R/W, Address = 0xEC80_0018
CANn_BRP
Bit
Description
R/W
Reset Value
Reserved [15:4]
Reserved
R
0
BRPE
[3:0]
Baud Rate Prescaler Extension
0x00-0x0F: By programming BREP the Baud Rate Prescaler is
extended to values up to 1023. The actual interpretation by the
hardware is that one more than the value programmed by
BRPE (MSBs) and BRP(LSBs) is used.
R/W 0
6.2.8
Message Interface Register Sets
There are two sets of Interface Registers which are used to control the CPU access to the Message RAM. The
Interface Registers avoid conflicts between CPU accesses to the Message RAM and CAN message reception
and transmission by buffering the data to be transferred. A complete Message Object or parts of the Message
Object may be transferred between the Message RAM and the IFx Message Buffer registers in one single
transfer.
The function of the two interface register sets is identical (except for test mode Basic). One set of registers is used
for data transfer to the Message RAM while the other set of registers is used for the data transfer from the
Message RAM, allowing both processes to be interrupted by each other. Figure 6 shows an overview of the two
Interface Register sets.
Each set of Interface Registers consists of Message Buffer Registers controlled by their own Command Registers.
The Command Mask Register specifies the direction of the data transfer and which parts of a Message Object will
be transferred. The Command Request Register is used to select a Message Object in the Message RAM as
target or source for the transfer and to start the action specified in the Command Mask Register.
Base Offset
IF2 Register Set
Base Offset
IF2 Register Set
0x20
IF1 Command Request
0x80
IF2 Command Request
0x24
IF1 Command Mask
0x84
IF2 Command Mask
0x28
IF1 Mask1
0x88
IF2 Mask1
0x2C
IF1 Mask2
0x8C
IF2 Mask2
0x30
IF1 Arbitration 1
0x90
IF2 Arbitration 1
0x34
IF1 Arbitration 2
0x94
IF2 Arbitration 2
0x38
IF1 Message Control
0x98
IF2 Message Control
0x3C
IF1 Data A 1
0x9C
IF2 Data A 1
0x40
IF1 Data A 2
0xA0
IF2 Data A 2
0x44
IF1 Data B 1
0xA4
IF2 Data B 1
0x48
IF1 Data B 2
0xA8
IF2 Data B 2
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...