Samsung S5PC100, User Manual

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CF CONTROLLER S5PC100 USER’S MANUAL (REV1.0)
5.5-8
Table 5.5-3 Timing Parameter Each PIO Mode
Register Transfer MODE0 MODE1 MODE2 MODE3 MODE4
t1 (70, --) (50, --) (30, --) (30, --) (25, --)
t2 (290, --) (290, --) (290, --) (80, --) (70, --)
tEOC (240, --) (43, --) (10, --) (70, --) (25, --)
t1+t2+tEOC (600, --) (383, --) (330, --) (180, --) (120, --)
Data Transfer MODE0 MODE1 MODE2 MODE3 MODE4
t1 (70, --) (50, --) (30, --) (30, --) (25, --)
t2 (165, --) (125, --) (100, --) (80, --) (70, --)
tEOC (365, --) (208, --) (110, --) (70, --) (25, --)
t1+t2+tEOC (600, --) (383, --) (240, --) (180, --) (120, --)
unit “ns”
1.5.1 ATA_PIO_TIME Register Setting Example (In case of Data Transfer)
The “t1” minimum time is 70ns in the system clock of 100MHz (10ns). It gives 7; “t1” divided by 10ns. This case
has no residual, therefore pio_t1[3:0] assigns 6 which is 7 minus 1. If it has residual, assign the quotient at
pio_t1[3:0].
ATA_PIO_TIME (Tpara) = PIO mode (Minimum, Maximum)/ system clock – 1
tPIO0 (Timing Parameter of PIO Mode 0 in case of Register Transfer) : 32’h000_17_1c_6
t1: 70/10 = 7 pio_t1 value = 7- 1 = 6 pio_t1[3:0] : 0x6
t2: 290/10 = 29 pio_t2 value = 29 - 1 = 28 pio_t2[11 :4] : 0x1c
teoc: 240/10 = 24 pio_teoc value = 24 - 1 = 23 pio_teoc[19:12] : 0x17
Steps for ATAPI PIO protocol:
•
Initialization: Address (ATA_DA) and chip selection (ATA_CS0n/CS1n) setup if the read/ write strobe
(ATA_DIORn/DIOWn) is deasserted.
•
Data Read/ Write setup: Both Driver and Host shall do that the data on the data line for setup.
•
Data Read/ Write hold: Both Driver and Host must remain stable after read/ write strobe signal is asserted
(active low).