Samsung S5PC100, User Manual, Page: 1801 / 1863

CRYPTO ENGINE BLOCK S5PC100 USER’S MANUAL (REV1.0)
11.3-22
to 0 on FTx_Reset = 1. Read/Write.
FTx_Start [0]
FIFO-Tx transfer start bit. Resets to 0 if internal FSM starts
transferring data to destination. Resets to 0 on FTx_Reset = 1.
Read/Write.
1’b0
4.3.8 FIFO-Tx Message Length Register(FTx_MLen, R/W, Address = 0xF411_0004)
FTx_MLen Bit Description Reset
Value
FTx_MLen [31:0]
Message Length in word (32-bit) unit.
Resets to its reset value if FTx_Reset field of FTx_Ctrl register is
set.
Read/Write.
31’b0
4.3.9 FIFO-Tx Block Size Register (FTx_BlkSz, R/W, Address = 0xF411_0008)
FTx_BlkSz Bit Description Reset
Value
FTx_BlkSz [31:0]
Block size of destination module (in word(32-bit) unit). FIFO-Tx
transfers FTx_BlkSz word and then triggers the destination
module to start processing. The destination module is selected
by FTx_Dest_Module field in FTx_Ctrl.
Resets to its reset value if FTx_Reset field of FTx_Ctrl register is
set.
Read/Write.
32’b0
4.3.10 FIFO-Tx Source Address Register (FTx_SrcAddr, R/W, Address = 0xF411_000C)
FTx_SrcAddr Bit Description Reset
Value
FTx_SrcAddr [31:0]
Internal memory address of source output buffer. FIFO-Tx
transfers data from this address.
Resets to its reset value if FTx_Reset field of FTx_Ctrl register is
set.
Read/Write.
31’b0
4.3.11 FIFO-Tx Message Length Counter (FTx_MLenCnt, R/W, Address = 0xF411_0010)
FTx_MLenCnt Bit Description Reset
Value
FTx_MLenCnt [31:0]
Number of words left for transfer. After counting down to 0, this
register resets to the value in FTx_MLen.
31’b0