Samsung S5PC100, User Manual

Page: 1705 / 1863

PCM AUDIO INTERFACE S5PC100 USER’S MANUAL (REV1.0)
10.5-4
4 PCM INPUT CLOCK DIAGRAM
Figure 10.5-3 Input Clock Diagram for PCM
S5PC100X provideS PCM with a variety of clock. As described in the Figure 10.5-3, PCM interface is able to
select clock from two PCLK or AUDIO clock (CLKAUDIOI) which is from system controller. You can select
CLKAUDIO among PLLs or external input clock (PCMCDCLK and IISCDCLK). To select CLKAUDIO, please refer
to the Clock Controller.
5 I/O DESCRIPTIONS
Funtion Signal I/O Description Pad Type
PCM0_SCLK Output PCM0 Serial Shift Clock Xmmc2CLK muxed
PCM0_EXTCLK Input PCM0 External Clock source Xmmc2CMD muxed
PCM0_FSYNC Output PCM0 Serial Data Indicator and Synchronizer Xmmc2DATA[0] muxed
PCM0_SIN Input PCM0 Serial Input Data Xmmc2DATA[1] muxed
PCM0_SOUT Output PCM0 Serial Output Data Xmmc2DATA[2] muxed
PCM1_SCLK Output PCM1 Serial Shift Clock Xi2s1SCLK muxed
PCM1_EXTCLK Input PCM1 External Clock Source Xi2s1CDCLK muxed
PCM1_FSYNC Output PCM1 Serial Data Indicator and Synchronizer Xi2s1LRCLK muxed
PCM1_SIN Input PCM1 Serial Input Data Xi2s1SDI muxed
PCM1_SOUT Output PCM1 Serial Output Data Xi2s1SD0 muxed