Samsung S5PC100, User Manual

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SPDIF TRANSMITTER S5PC100 USER’S MANUAL (REV1.0)
10.6-2
3 BLOCK DIAGRAM
audio_if_core Spdif_tx
out_spdif
Apb Interface APB
DMA Interface
Clock
generator
O_SPDIF_DATA
SCLK_SPDIF
I_MCLK_EXT
128f
s
Clock
Mux
Figure 10.6-1 SPDIFOUT Block Diagram
•
APB Interface Block: Defines register banks to control the driving of SPDIFOUT module and data buffers
to store linear or non-linear PCM data.
•
DMA Interface Block: Requests DMA service to IODMA depending on the status of data buffer in APB
Interface block
•
Clock Generator Block: Makes 128fs (sampling frequency) clock used in out_spdif block from system audio
clock (MCLK)
•
Clock Multiplex Block: System audio clock (MCLK) can be selected as internal MCLK or external MCLK.
•
Audio_if_core Block: Acts as interface block between data buffer and out_spdif block. Finite-state machine
controls the flow of PCM data.
•
spdif_tx Block: Inserts burst preamble and executes zero-stuffing in the nonlinear PCM stream. Linear PCM
data are bypassed by spdif_tx module.
•
out_spdif Block: Makes SPDIF format. It inserts 4-bit preamble, 16- or 20- or 24-bit data, user-data bit,
validity bit, channel status bit and parity bit into the appropriate position of 32-bit word. It modulates each bit to
bi-phase format.