Samsung S5PC100, User Manual

Page: 537 / 1863

CF CONTROLLER S5PC100 USER’S MANUAL (REV1.0)
5.5-42
5.2.15 ATA Multi_word DMA Timing (ATA_MDMA_TIME, R/W, Address = 0xE780_1928)
ATA_MDMA_TIME Bit Description R/W Reset Value
Reserved [31:20] Reserved R 0x0
dma_teoc [19:12] DMA timing parameter, Teoc, end of cycle time R/W 0x2C
dma_t2 [11:4] DMA timing parameter, tD, DIOR/DIOWn pulse width R/W 0x23
dma_t1 [3:0] DMA timing parameter, tM, CS0,1n valid to DIOR/Wn R/W 0x8
5.2.16 ATA PIO Time (ATA_PIO_TIME, R/W, Address = 0xE780_192C)
ATA_PIO_TIME Bit Description R/W Reset Value
Reserved [31:20] Reserved R 0x0
pio_teoc [19:12]
PIO timing parameter, teoc, end of cycle time
It shall not have zero value.
R/W 0x27
pio_t2 [11:4]
PIO timing parameter, t2, DIOR/Wn pulse width
It cannot have zero value.
R/W 0x2f
pio_t1 [3:0] PIO timing parameter, t1, address valid to DIOR/Wn R/W 0xa
5.2.17 ATA UDMA Time (ATA_UDMA_TIME, R/W, Address = 0xE780_1930)
ATA_UDMA_TIME Bit Description R/W Reset Value
Reserved [31:28] Reserved R 0x0
udma_tdvh [27:24] UDMA timing parameter tDVH R/W 0x8
udma_tdvs [23:16]
UDMA timing parameter tDVS
It cannot have zero value.
R/W
0x0b
udma_trp [15:8] UDMA timing parameter tRP R/W 0x1a
udma_tss [7:4] UDMA timing parameter, tSS R/W 0x8
udma_tackenv [3:0]
UDMA timing parameter tENV (envelope time (From
DMACKn to STOP and HDMARDYn), tACK (setup and
hold time for DMACKn)
R/W 0x3