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S5PC100 USER’S MANUAL (REV1.0)
Power Management
2.4-3
2 FUNCTION DESCRIPTION
There are two types of power consumption namely static and dynamic.. Static power is consumed if power to a
circuit is supplied and there is no active operation in the circuit. Dynamic power is consumed if the signal to a
circuit is toggling, and there is some active operation in the circuit. The static power consumption is due to leakage
current in the process while the dynamic power consumption is due to charging and discharging of capacitors. The
dynamic power consumption depends on operating voltage, operating frequency, and toggling ratios of the logic
gate.
Various power-saving techniques have been developed and they are listed in Table 2.4-1.
Table 2.4-1 Comparison of Power Saving Techniques
State Retention
Power saving
techniques
Result
Clock
Power
Normal F/F
Retention F/F
Frequency scaling
Reduce dynamic power
Enable
Supplied
Keep state
Clock off
Minimize dynamic power
Disable
Supplied
Keep state
Power off
Minimize leakage power
Disable
Not supplied
(internally off)
Lose state
Keep state
External power off
Nearly zero power
Disable
Not supplied
(externally off)
Lose state
Frequency scaling means that the frequency of clock to a specific Intellectual Property (IP) module is lowered if
the module is not required to run fast. Frequency scaling reduces dynamic power.
Clock off means that clock gating cells in Clock Controller is used to disable clock to a specific IP module. These
clock gating cells are controlled by setting registers (CLK_GATE_D0_0-2, CLK_GATE_D1_0-5, and
CLK_GATE_SCLK_0-1) in Clock Controller. If clock off is applied, power to logic gate is still supplied, and
therefore the states of Normal F/F (Flip-Flop) and Retention F/F are maintained. Retention F/F is developed to
meet special purpose to keep its state although power is not supplied due to power off.
Power off means that current path to a specific power domain (a group of IP modules) is internally disconnected
using switch cells in that power domain. Therefore power to that domain is not supplied.
The switch cells are controlled by setting registers (NORMAL_CFG, and STOP_CFG) in PMU. Note that external
power to S5PC100 is not off. Therefore, there can be two power off techniques as listed below.
•
Power off without state retention
♦
Normal F/F is used.
♦
Wakeup reset is necessary.
•
Power off with state retention
♦
Retention F/F is used.
♦
Wakeup reset is not necessary.
The power off does not preserve the state of normal F/F in the power-down domain. A power domain except TOP
domain has only normal F/F, and does not have retention F/F. Therefore, sub-domain, power domain except TOP
domain, does not preserve the state of F/F when the sub-domain is power-off. If a sub-domain is powered up
again, a wakeup reset is invoked for the modules in the sub-domain.
But, top domain has both normal F/F and retention F/F, and each module in top domain has only normal F/F or
retention F/F. It is not the case that a module has both normal F/F and retention F/F. Therefore, the module that
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...