S5PC100 USER’S MANUAL (REV1.0)
USB HOST CONTROLLER
8.9-41
UHCRHPSTAT2
Bit
Description
R/W
Reset Value
error-babble), cause the PortEnableStatus bit to be
cleared. Changes from HCD writes do not set this bit.
The HCD writes a 1 to clear this bit. Writing a 0 has no
effect
0 = No change in PortEnableStatus.
0 = Change in PortEnableStatus.
CSC [16]
ConnectStatusChange
This bit is set by hardware whenever connect or
disconnect event occurs. The HCD writes a 1 to clear
this bit. Writing a 0 has no effect. If
CurrentConnectStatus is cleared when a set-port-reset,
set-port-enable, or set-port-suspend write occurs, this
bit is set to force the driver to reevaluate the connection
status since these writes must not occur if the port is
disconnected.
0 = No change in CurrentConnectStatus.
1 = Change in CurrentConnectStatus.
NOTE: If the device removable bit in the Root Hub
Descriptor B register is set (indicating that this device is
not removable), then the CSC bit is set only after a root
hub reset to inform the system that the
device is attached.
R/W
Reserved
[15:10]
Read as unknown and must be written as zero.
-
LSDA
[9]
(read) LowSpeedDeviceAttached / (write)
ClearPortPower
If read, this bit indicates the speed of the device
attached to this port. If set, a low-speed device is
attached to this port. If clear, a fullspeed device is
attached to this port. This field is valid only if the
CurrentConnectStatus is set. If the HCD writes a 1 to
this bit, the controller clears the PortPowerStatus bit.
Writing a 0 has no effect.
0 = Full-speed device attached.
1 = Low-speed device attached.
R/W
C
PPS [8]
(read)
PortPowerStatus / (write) SetPortPower
This bit reflects the PortPowerStatus, regardless of the
type of powerswitching implemented. This bit is cleared
if an over-current condition is detected. HCD sets this
bit by writing Set Port Power (writing a 1 to this bit,
UHCRHPS1/2/3[PPS]) or Set Global Power
(UHCRHS[LPSC]). HCD clears this bit by writing Clear
Port Power (writing a 1 to UHCRHPS1/2/3[LSDA]) or
Clear Global Power (UHCRHS[LPS]).
0 = Port power is off.
1 = Port power is on.
The HCD writes a 0b1 to set the PortPowerStatus bit.
Writing 0b0 has no effect
R/W
Reserved
[7:5]
Read as unknown and must be written as zero.
-
Summary of Contents for S5PC100
Page 21: ...MEMORY MAP S5PC100 USER S MANUAL REV1 0 1 2 2 ...
Page 34: ...S5PC100 USER S MANUAL REV1 0 BALL MAP SIZE POP 1 1 9 1 4 MCP CONNECTION ...
Page 49: ...IROM CODE S5PC100 USER S MANUAL REV1 0 2 6 4 12 Mhz 300 0 Mhz 100 0 Mhz 79 5 Mhz 20 6 Mhz ...
Page 174: ...CLOCK CONTROLLER S5PC100 USER S MANUAL REV1 0 2 3 24 Rs 0ohm Rf 1Mohm CL 10 35pF ...
Page 322: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 4 Figure 3 2 2 S5PC100 Coresight Structure ...
Page 330: ...CORESIGHT S5PC100 USER S MANUAL REV1 0 3 2 12 Figure 3 2 7 ETB Block Diagram ...
Page 345: ...S5PC100 USER S MANUAL REV1 0 ASYNC BRIDGE 3 4 3 Figure 3 4 2 Asynchronous Bridge Components ...
Page 359: ...S5PC100 USER S MANUAL REV1 0 VECTORED INTERRUPT CONTROLLER 4 1 3 Figure 4 1 2 VIC Daisy Chain ...
Page 651: ...S5PC100 USER S MANUAL REV1 0 UART 8 1 27 Figure 8 1 10 UINTSP UINTP and UINTM block diagram ...
Page 652: ...UART S5PC100 USER S MANUAL REV1 0 8 1 28 NOTES ...
Page 743: ...S5PC100 USER S MANUAL REV1 0 MIPI HSI INTERFACE CONTROLLER 8 6 13 ...
Page 756: ...MIPI HSI INTERFACE CONTROLLER S5PC100 USER S MANUAL REV1 0 8 6 26 NOTES ...
Page 800: ...MIPI CSIS S5PC100 USER S MANUAL REV1 0 8 8 10 NOTES ...
Page 816: ...USB HOST CONTROLLER S5PC100 USER S MANUAL REV1 0 8 9 16 ...
Page 935: ...S5PC100 USER S MANUAL REV1 0 MODEM INTERFACE 8 11 13 NOTES ...
Page 1111: ...S5PC100 USER S MANUAL REV1 0 IMAGE ROTATOR 9 2 3 3 4 180 DEGREE ROTATION ...
Page 1112: ...IMAGE ROTATOR S5PC100 USER S MANUAL REV1 0 9 2 4 3 5 90 AND 270 DEGREE ROTATION ...
Page 1118: ...S5PC100 USER S MANUAL REV1 0 CAMERA INTERFACE 9 3 3 Figure 9 3 2 Camera Interface Overview ...
Page 1181: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 6 Figure 9 4 5 YCbCr4 2 2 Color Format ...
Page 1199: ...JPEG S5PC100 USER S MANUAL REV1 0 9 4 24 NOTES ...
Page 1245: ...3D ACCELERATOR S5PC100 USER S MANUAL REV1 0 9 6 18 ...
Page 1353: ...TVOUT VIDEO DAC S5PC100 USER S MANUAL REV1 0 9 7 32 ...
Page 1452: ...S5PC100 USER S MANUAL REV1 0 VIDEO PROCESSOR 9 8 43 NOTES ...
Page 1482: ...MIXER S5PC100 USER S MANUAL REV1 0 9 9 30 NOTES ...
Page 1664: ...S5PC100 USER S MANUAL REV1 0 I2S CONTROLLER 5 1CH 10 2 31 NOTES ...
Page 1701: ...AC97 CONTROLLER S5PC100 USER S MANUAL REV1 0 10 4 18 NOTES ...
Page 1731: ...SPDIF TRANSMITTER S5PC100 USER S MANUAL REV1 0 10 6 16 NOTES ...
Page 1744: ...S5PC100 USER S MANUAL REV1 0 ADC AND TOUCH SCREEN INTERFACE 10 7 13 NOTES ...
Page 1750: ...KEYPAD INTERFACE S5PC100 USER S MANUAL REV1 0 10 8 6 Figure 10 8 7 Keypad I F Block Diagram ...
Page 1755: ...S5PC100 USER S MANUAL REV1 0 KEYPAD INTERFACE 10 8 11 NOTES ...
Page 1779: ...SECURE DOMAIN MANAGER S5PC100 USER S MANUAL REV1 0 11 2 22 NOTES ...