Samsung S5PC100, User Manual

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S5PC100 USER’S MANUAL (REV1.0) ONENAND CONTROLLER
5.3-7
address of the read/ write is in the area of the part that is being erased, the controller holds off the read/ write until
the erase is completed.
OneNAND Flash memory devices contain ECC circuitry and data is checked against the expected check code on
read commands. If an ECC error occurs during a read, the data is returned on the data bus, but the controller
marks the error by setting the Ld_Fail_Ecc_Err bit in the
int_error_status register and save error information in the
ecc_error_status register. In addition, the block and page of the failing read is saved in the ERR_PAGE_ADDR
and ERR_PAGE_ADDR_1 registers.
In addition to array access, MAP01 commands are also used to read and write alternate areas of the flash device
including OTP, boot and spare areas if these areas are selected through MAP10 commands.
2.5.3 MAP10.
The MAP10 interface is used to operate special functions of the memory device. For writes, the data is not
transferred to the memory device, but is used to manipulate the controller. For reads, the data is not information
from the memory device, but indicates status of the controller.
There are several operations executed through the MAP10 commands, such as erase, lock, unlock, lock-tight,
copy back, OTP access, spare area access, verify read, pipeline read, pipeline write and read/ modify/ write. The
lower two bytes of the address bus determines the type of MAP10 command.
2.5.4 The address bits [15:0] Identify the command type. MAP11
The MAP11 interface is a direct interface with the memory device. Through this interface, you have direct control
of the address specified without any translation through the controller. The address MAPused is dependent on the
memory device being used. Data written or read is written to or read from the memory device itself. This command
type is used to debug or test the memory device.
MAP11 and MAP10 can not share INT pin. If the system use MAP11 and MAP10 in same time, replace external
interrupt instead of INT pin.