MPC563XM Reference Manual, Rev. 1
508
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
16.9.13.33 Pad Configuration Register 134 - 135 (SIU_PCR134 - SIU_PCR135)
The SIU_PCR134 - SIU_PCR135 registers control the functions, directions, and static electrical attributes
of the eTPU_A[20:21]_IRQ[8:9]_GPIO[134:135] pins.
Figure 16-49. eTPU_A[20:21]_IRQ[8:9]_GPIO[134:135] Pad Configuration Register (SIU_PCR134 -
SIU_PCR135)
16.9.13.34 Pad Configuration Register 136 (SIU_PCR136)
The SIU_PCR136 register control the function, direction, and static electrical attributes of the
eTPU_A[22]_IRQ[10]_eTPU_A[17]_GPIO[136] pin. The eTPU_A[17] is an output only function.
Figure 16-50. eTPU_A[22]_IRQ[10]_eTPU_A[17]_GPIO[136] Pad Configuration Register (SIU_PCR136)
SI 0x14C - SI 0x14E (2)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA[0-1]
OBE
1
1
The OBE bit must be set to one for both eTPU_A[20:21] and GPIO[134:135] when configured as outputs.
IBE
2
2
When configured as IRQ or GPO, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI
register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to one for both
eTPU_A[20:21] and GPIO[134:135] when configured as inputs.
0
0
ODE
HYS SRC[0-1] WPE
WPS
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
U
3
3
The weak pull up/down selection at reset for the eTPU_A[20:21] pins are determined by the WKPCFG pin.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
SI 0x150
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA[0-2]
OBE
1
1
The OBE bit must be set to one for both eTPU_A[22] and GPIO[136] when configured as outputs.
IBE
2
2
When configured as IRQ or GPO, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI
register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to one for both
eTPU_A[22] and GPIO[136] when configured as inputs.
0
0
ODE
HYS
SRC[0-1
]
WPE
WPS
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
U
3
3
The weak pull up/down selection at reset for the eTPU_A[22] pin is determined by the WKPCFG pin.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved