Rohde & Schwarz 1145.1010.04/05/06, Operating Manual

Page: 453 / 813

R&S
®
ZVA/ZVB/ZVT Status Reporting System
1145.1084.12 5.21 E-1
The status registers below belong to the device-dependent SCPI register model:
•
The STATus:OPERation register contains conditions which are part of the instrument's normal
operation.
•
The STATus:QUEStionable register indicates whether the data currently being acquired is of
questionable quality.
•
The STATus:QUEStionable:LIMit<1|2> register indicates the result of the limit check.
STB and SRE
The STatus Byte (STB) provides a rough overview of the instrument status by collecting the pieces of
information of the lower registers. The STB represents the highest level within the SCPI hierarchy. A
special feature is that bit 6 acts as the summary bit of the remaining bits of the status byte.
SRE and Service Request
The STatus Byte (STB) is linked to the Service Request Enable (SRE) register on a bit-by-bit basis.
•
The STB corresponds to the CONDition part of an SCPI register, indicating the current
instrument state.
•
The SRE corresponds to the ENABle part of an SCPI register.If a bit is set in the SRE and the
associated bit in the STB changes from 0 to 1, a Service Request (SRQ) is generated on the
GPIB bus.
Bit 6 of the SRE is ignored, because it corresponds to the summary bit of the STB.
Related common commands
The STB is read out using the command *STB? or a serial poll.
The SRE can be set using command *SRE and read using *SRE? .
The bits in the STB are defined as follows:
Bit
No. Meaning
3
QUEStionable status summary bit
This bit is set if an EVENt bit is set in the QUEStionable register and the associated ENABle bit is set to 1.
The bit indicates a questionable instrument status, which can be further pinned down by polling the QUEStionable
register.
5 ESB bit
Sum bit of the event status register. It is set if one of the bits in the event status register is set and enabled in the
event status enable register.
Setting of this bit implies an error or an event which can be further pinned down by polling the event status register.
IST Flag and PPE
In analogy to the Service Request (SRQ), the IST flag combines the entire status information in a single
bit. It can be queried by means of a parallel poll.
The Parallel Poll Enable (PPE) register determines which bits of the STB contribute to the IST flag. The
bits of the STB are ANDed with the corresponding bits of the PPE, with bit 6 being used as well in
contrast to the SRE. The IST flag results from the ORing of all results.