Infineon XDPP1100, Technical Reference Manual

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User Manual Please read the Important Notice and Warnings at the end of this document V 1.0
www.infineon.com/xdpp1100 page 1 of 562 2021-08-25
UM_2102_PL88_2103_193611
XDPP1100 technical reference manual
Digital power controller
About this document
Scope and purpose
This document focuses on the XDPP1100 hardware (HW) implementation, and it can be used as a reference
document for firmware (FW) developers. The aim is to describe high-level functions and provide block diagram
illustrations of the implemented HW. Furthermore, the purpose is to demonstrate how the XDPP1100 interacts
with external components within applications, and show how the sensed information from the analog input
pins is processed by the HW.
Intended audience
Power supply design and FW engineers, isolated digital brick module designers, telecom and server power
system designers.
Table of contents
About this document ....................................................................................................................... 1
Table of contents ............................................................................................................................ 1
1 Introduction .......................................................................................................................... 7
1.1 Applications ............................................................................................................................................. 7
1.2 Control registers and PMBus commands ............................................................................................... 7
1.3 Naming conventions ............................................................................................................................... 8
1.3.1 Loops and phases ............................................................................................................................... 8
1.3.2 Symbols and abbreviations ............................................................................................................... 8
1.3.3 Binary number format convention .................................................................................................. 11
1.4 Structure of this document ................................................................................................................... 12
2 Voltage sense ........................................................................................................................ 13
2.1 VS module configuration ...................................................................................................................... 14
2.2 Voltage sense analog-to-digital converter ........................................................................................... 17
2.2.1 Analog front end and front-end compensation .............................................................................. 18
2.2.2 Tracking ADC .................................................................................................................................... 18
2.3 Voltage sense processor ....................................................................................................................... 20
2.3.1 Output voltage processing .............................................................................................................. 20
2.3.2 Rectification voltage processing ..................................................................................................... 21
2.3.2.1 V
RECT
timing for single PWM signal ............................................................................................... 22
2.3.2.2 V
RECT
watchdog timer ................................................................................................................... 23
2.3.2.3 Deglitcher .................................................................................................................................... 23
2.3.2.4 V
RECT
timing for two PWM signals ................................................................................................ 24
2.3.2.5 V
IN
transient response ................................................................................................................. 24
2.3.2.6 V
RECT
start-up programming ........................................................................................................ 25
2.3.2.7 Same cycle response................................................................................................................... 26
2.3.2.8 V
RECT
delay counters ..................................................................................................................... 27
2.3.3 V
IN
processing ................................................................................................................................... 28