User Manual
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V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Current sense (IS)
Peripheral Field name
Access Address
Bits
Description
ADC feedback if the falling PWM
edge causes noise on the current
sense signal.
LSB = 40 ns, range = 0 to 280 ns
isen
ce_blank_pe_dly
RW
7000_240Ch
(ISEN)
7000_280Ch
(BISEN)
[21:19] Defines the time after a PWM pulse
rising edge during which the current
sense is in emulation mode only
(i.e., the tracking feedback from the
IADC is ignored). This parameter
can be used to blank the ADC
feedback if the rising PWM edge
causes noise on the current sense
signal.
LSB = 40 ns, range = 0 to 280 ns
isen
ce_kslope_lm
RW
7000_2410h
(ISEN)
7000_2810h
(BISEN)
[8:0]
Transformer magnetizing
inductance (L
m
) current sense slope
normalized to code/samples at 1.0
V. Only used for primary-side
current sense.
ce_kslope_lm = 1.0 V * 10 ns * N
turn
/
(L
m
(nH) * APC(A))
LSB = 2^-13 V/V, range = 0.0 to
0.06238 V/V
isen
ce_iterm
RW
7000_2410h
(ISEN)
7000_2810h
(BISEN)
[12:9]
Current sense tracking error
integrator coefficient. Set to 0 to
disable error accumulation.
LSB = 2^-13 A/A, range = 0.0 to
1.833e-3 A/A
isen
ce_vout_sel
RW
7000_2410h
(ISEN)
7000_2810h
(BISEN)
[14:13] Current sense V
OUT
source select.
Note that CDR in the table below
indicates current-doubler topology
on the secondary.
CE0 (ISEN):
0: Loop 0 V
OUT
1: Loop 0 V
OUT
CDR
2: Loop 0 V
OUT
3: Loop 0 V
OUT
CDR
CE1 (BISEN):
0: Loop 0 V
OUT
1: Loop 0 V
OUT
CDR
2: Loop 1 V
OUT
3: Loop 1 V
OUT
CDR
isen
ce_vrect_sel
RW
7000_2410h
(ISEN)
7000_2810h
(BISEN)
[17:15] Current sense V
RECT
(V
IN
) source
select.
CE0 (ISEN):
0: V
RECT
(VRSEN/VRREF)
1: BV
RECT
(BVRSEN/BVRREF)
2: pid_ff_vrect_override
3: PRISEN
