Infineon XDPP1100, Technical Reference Manual

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User Manual 48 of 562 V 1.0
2021-08-25
XDPP1100 technical reference manual
Digital power controller
Current sense (IS)
FET PWM
output
Register programming Register value
SR3 PWM11 Set bit field values corresponding PWM9 and PWM11 to 1 and other
bit fields to 0 in
ceX_off_mask1
ceX_off_mask1 =
500h
SR4 PWM12 Set bit field values corresponding PWM10 and PWM12 to 1 and
other bit fields to 0 in
ceX_off_mask0
ceX_off_mask0 =
A00h
3.2.2.2 Slope estimator
The slope estimation provides the current shape based on the PWM timing and relevant system parameters. It
is based on the general inductor equation given in (3.1).
𝑉
𝐿
= 𝐿
𝑑𝑖
𝑑𝑡
(3.1)
From this equation, the expression for the current is obtained as given in (3.2) for the slope estimator.
𝑑𝑐 =
𝑑𝑖
𝐴𝑃𝐶
= 𝑉
𝑑𝑡
𝐿∗𝐴𝑃𝐶
(3.2)
Where:
•
D c is “delta code” referenced to the IADC LSB (current in amps = ADC codes * APC)
•
APC is “amps per code” , and it maps the IADC LSB to amps, as defined by PMBus parameter MFR_IOUT_APC
and discussed in more detail in section 3.3.1
•
Inductor voltage consists of the measured voltages V
OUT
, V
IN
and/or V
RECT
•
Normalized current slope
𝑑𝑡
𝐿∗𝐴𝑃𝐶
is defined by the parameter ceX_kslope_didv
The definition for the current slope depends on whether the current is sensed on the primary or secondary side,
and on the topology. The relevant parameters for slope specification are described below, after inductor
voltage definition.
Inductor voltage
The voltage across the inductor is obtained based on the measured voltages V
OUT
, V
IN
and/or V
RECT
, depending on
the topology and the PWM state. The XDPP1100 controller supports inductor voltage equations for buck-
derived, as well as boost and buck-boost topologies. The topology is selected via register
ceX_topology . The
supported topologies and their corresponding inductor voltage equations for different PWM states are shown
in
Table 12 .
Table 12 Topology selection for CE
ce_topology Topologies V
ON
equation V
OFF
equation V
HIZ
equation
0 Buck, ACF, HB, FB V
RECT
- V
OUT
-V
OUT
-V
OUT
- V
body
1 Boost V
RECT
V
RECT
- V
OUT
V
RECT
- V
OUT
- V
body
2,3 Buck-boost V
RECT
-V
OUT
-V
OUT
- V
body
The voltage V
body
refers to the voltage across the body diode and it is hardcoded to 0.5 V. The measured voltages
V
OUT
and V
RECT
can be selected via the following registers:
•
ceX_vout_sel for V
OUT
selection
•
ceX_vrect_sel for V
RECT
selection
Table 13 and Table 14 provide the different voltage source options for V
OUT
and V
RECT
, where X = 0 refers to
ISEN/IREF input pins and 1 refers to BISEN/BIREF. The “ CDR ” in Table 13 indicates current doubler topology on
the secondary.